Re: [Qemu-devel] [PATCH v17 0/9] 8bit AVR cores

[no-reply@patchew.org]

Hi,

Your series seems to have some coding style problems. See output below for
more information:

Message-id: 1471522070-77598-1-git-send-email-mrolnik@gmail.com
Subject: [Qemu-devel] [PATCH v17 0/9] 8bit AVR cores
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash

BASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0

# Useful git options
git config --local diff.renamelimit 0
git config --local diff.renames True

commits="$(git log --format=%H --reverse $BASE..)"
for c in $commits; do
    echo "Checking PATCH $n/$total: $(git show --no-patch --format=%s $c)..."
    if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
        failed=1
        echo
    fi
    n=$((n+1))
done

exit $failed
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 * [new tag]         patchew/1471522070-77598-1-git-send-email-mrolnik@gmail.com -> patchew/1471522070-77598-1-git-send-email-mrolnik@gmail.com
Switched to a new branch 'test'
294e7a4 target-avr: adding instruction decoder
3d36738 target-avr: instruction decoder generator
35bf67b target-avr: adding instruction translation
18e3870 target-avr: adding helpers for IN, OUT, SLEEP, WBR & unsupported instructions
3ccde73 target-avr: adding AVR interrupt handling
8786607 target-avr: adding instructions encodings
f48b5f2 target-avr: adding a sample AVR board
5a2840e target-avr: adding AVR CPU features/flavors
4e72990 target-avr: AVR cores support is added.

=== OUTPUT BEGIN ===
Checking PATCH 1/9: target-avr: AVR cores support is added....
Checking PATCH 2/9: target-avr: adding AVR CPU features/flavors...
Checking PATCH 3/9: target-avr: adding a sample AVR board...
Checking PATCH 4/9: target-avr: adding instructions encodings...
Checking PATCH 5/9: target-avr: adding AVR interrupt handling...
Checking PATCH 6/9: target-avr: adding helpers for IN, OUT, SLEEP, WBR & unsupported instructions...
Checking PATCH 7/9: target-avr: adding instruction translation...
Checking PATCH 8/9: target-avr: instruction decoder generator...
ERROR: suspect code indent for conditional statements (4, 4)
#810: FILE: target-avr/cpugen/src/cpugen.cpp:440:
+    if (argc != 2) {
[...]
+    }

total: 1 errors, 0 warnings, 1225 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

Checking PATCH 9/9: target-avr: adding instruction decoder...
=== OUTPUT END ===

Test command exited with code: 1


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