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From: James Hogan <james.hogan@imgtec.com>
To: qemu-devel@nongnu.org
Cc: famz@redhat.com, leon.alrae@imgtec.com, aurelien@aurel32.net
Subject: Re: [Qemu-devel] [PATCH 0/9] target-mips: Add Enhanced Virtual Addressing (EVA) support
Date: Tue, 6 Sep 2016 13:09:37 +0100	[thread overview]
Message-ID: <20160906120937.GA1196@jhogan-linux.le.imgtec.org> (raw)
In-Reply-To: <20160906111834.76033.11400@ex-std-node742.prod.rhcloud.com>

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On Tue, Sep 06, 2016 at 04:18:38AM -0700, no-reply@patchew.org wrote:
> Checking PATCH 1/9: target-mips: Add CP0_Ebase.WG (write gate) support...
> ERROR: space prohibited after that '&' (ctx:WxW)
> #104: FILE: target-mips/op_helper.c:1529:
> +    if (arg1 & (1 << CP0EBase_WG) & env->CP0_EBase_rw_bitmask) {
>                                    ^
> 
> ERROR: space prohibited after that '&' (ctx:WxW)
> #116: FILE: target-mips/op_helper.c:1540:
> +    if (arg1 & (1 << CP0EBase_WG) & env->CP0_EBase_rw_bitmask) {
>                                    ^

its a bitwise and operator, not an address-of operator, so I presumed
this was a false positive.

> Checking PATCH 6/9: target-mips: Add an MMU mode for ERL...
> ERROR: trailing statements should be on next line
> #94: FILE: target-mips/op_helper.c:97:
> +    case 3: cpu_##insn##_error_ra(env, addr, val, retaddr); break;      \

And this is merely consistent with the surrounding lines so I didn't
bother fixing it.

Cheers
James

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      reply	other threads:[~2016-09-06 12:09 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-06 11:03 [Qemu-devel] [PATCH 0/9] target-mips: Add Enhanced Virtual Addressing (EVA) support James Hogan
2016-09-06 11:03 ` [Qemu-devel] [PATCH 1/9] target-mips: Add CP0_Ebase.WG (write gate) support James Hogan
2016-10-07 13:42   ` Yongbok Kim
2016-10-07 15:37     ` James Hogan
2016-09-06 11:03 ` [Qemu-devel] [PATCH 2/9] target-mips: Prepare loads/stores for EVA James Hogan
2016-10-07 15:32   ` Yongbok Kim
2016-09-06 11:03 ` [Qemu-devel] [PATCH 3/9] target-mips: Decode EVA load & store instructions James Hogan
2016-10-07 15:34   ` Yongbok Kim
2016-10-07 15:48     ` James Hogan
2016-10-07 16:05       ` Yongbok Kim
2016-10-07 16:16         ` James Hogan
2016-09-06 11:03 ` [Qemu-devel] [PATCH 4/9] target-mips: Check memory permissions with mem_idx James Hogan
2016-10-07 15:48   ` Yongbok Kim
2017-07-06 20:50     ` James Hogan
2016-09-06 11:03 ` [Qemu-devel] [PATCH 5/9] target-mips: Abstract mmu_idx from hflags James Hogan
2016-10-07 16:08   ` Yongbok Kim
2017-07-06 20:55     ` James Hogan
2016-09-06 11:03 ` [Qemu-devel] [PATCH 6/9] target-mips: Add an MMU mode for ERL James Hogan
2016-10-13 13:18   ` Yongbok Kim
2017-07-06 20:58     ` James Hogan
2016-09-06 11:03 ` [Qemu-devel] [PATCH 7/9] target-mips: Add segmentation control registers James Hogan
2016-10-10 14:57   ` Yongbok Kim
2017-07-06 22:05     ` James Hogan
2016-09-06 11:03 ` [Qemu-devel] [PATCH 8/9] target-mips: Implement segmentation control James Hogan
2016-10-13 13:06   ` Yongbok Kim
2017-07-06 23:15     ` James Hogan
2016-09-06 11:03 ` [Qemu-devel] [PATCH 9/9] target-mips: Add EVA support to P5600 James Hogan
2016-10-13 13:15   ` Yongbok Kim
2016-09-06 11:18 ` [Qemu-devel] [PATCH 0/9] target-mips: Add Enhanced Virtual Addressing (EVA) support no-reply
2016-09-06 12:09   ` James Hogan [this message]

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