Re: [Qemu-devel] [PATCH v4 1/3] target-ppc: add TLB_NEED_LOCAL_FLUSH flag

[David Gibson <david@gibson.dropbear.id.au>]

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On Wed, Sep 14, 2016 at 11:24:00AM +0530, Nikunj A Dadhania wrote:

You need some sort of commit message here.

I'd ignore and apply anyway, except that there are some other things
in later patches that will need a respin.

> Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
> ---
>  target-ppc/cpu.h         | 1 +
>  target-ppc/helper_regs.h | 4 ++--
>  target-ppc/mmu-hash64.c  | 4 ++--
>  target-ppc/mmu_helper.c  | 6 +++---
>  4 files changed, 8 insertions(+), 7 deletions(-)
> 
> diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
> index 1e808c8..71111dc 100644
> --- a/target-ppc/cpu.h
> +++ b/target-ppc/cpu.h
> @@ -1009,6 +1009,7 @@ struct CPUPPCState {
>      bool tlb_dirty;   /* Set to non-zero when modifying TLB                  */
>      bool kvm_sw_tlb;  /* non-zero if KVM SW TLB API is active                */
>      uint32_t tlb_need_flush; /* Delayed flush needed */
> +#define TLB_NEED_LOCAL_FLUSH   0x1
>  #endif
>  
>      /* Other registers */
> diff --git a/target-ppc/helper_regs.h b/target-ppc/helper_regs.h
> index 3d279f1..69204a5 100644
> --- a/target-ppc/helper_regs.h
> +++ b/target-ppc/helper_regs.h
> @@ -157,9 +157,9 @@ static inline int hreg_store_msr(CPUPPCState *env, target_ulong value,
>  static inline void check_tlb_flush(CPUPPCState *env)
>  {
>      CPUState *cs = CPU(ppc_env_get_cpu(env));
> -    if (env->tlb_need_flush) {
> -        env->tlb_need_flush = 0;
> +    if (env->tlb_need_flush & TLB_NEED_LOCAL_FLUSH) {
>          tlb_flush(cs, 1);
> +        env->tlb_need_flush &= ~TLB_NEED_LOCAL_FLUSH;
>      }
>  }
>  #else
> diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c
> index 8118143..1f52b64 100644
> --- a/target-ppc/mmu-hash64.c
> +++ b/target-ppc/mmu-hash64.c
> @@ -110,7 +110,7 @@ void helper_slbia(CPUPPCState *env)
>               *      and we still don't have a tlb_flush_mask(env, n, mask)
>               *      in QEMU, we just invalidate all TLBs
>               */
> -            env->tlb_need_flush = 1;
> +            env->tlb_need_flush |= TLB_NEED_LOCAL_FLUSH;
>          }
>      }
>  }
> @@ -132,7 +132,7 @@ void helper_slbie(CPUPPCState *env, target_ulong addr)
>           *      and we still don't have a tlb_flush_mask(env, n, mask)
>           *      in QEMU, we just invalidate all TLBs
>           */
> -        env->tlb_need_flush = 1;
> +        env->tlb_need_flush |= TLB_NEED_LOCAL_FLUSH;
>      }
>  }
>  
> diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c
> index 696bb03..d59d2f8 100644
> --- a/target-ppc/mmu_helper.c
> +++ b/target-ppc/mmu_helper.c
> @@ -1965,7 +1965,7 @@ void ppc_tlb_invalidate_one(CPUPPCState *env, target_ulong addr)
>           * we just mark the TLB to be flushed later (context synchronizing
>           * event or sync instruction on 32-bit).
>           */
> -        env->tlb_need_flush = 1;
> +        env->tlb_need_flush |= TLB_NEED_LOCAL_FLUSH;
>          break;
>  #if defined(TARGET_PPC64)
>      case POWERPC_MMU_64B:
> @@ -1979,7 +1979,7 @@ void ppc_tlb_invalidate_one(CPUPPCState *env, target_ulong addr)
>           *      and we still don't have a tlb_flush_mask(env, n, mask) in QEMU,
>           *      we just invalidate all TLBs
>           */
> -        env->tlb_need_flush = 1;
> +        env->tlb_need_flush |= TLB_NEED_LOCAL_FLUSH;
>          break;
>  #endif /* defined(TARGET_PPC64) */
>      default:
> @@ -2065,7 +2065,7 @@ void helper_store_sr(CPUPPCState *env, target_ulong srnum, target_ulong value)
>              }
>          }
>  #else
> -        env->tlb_need_flush = 1;
> +        env->tlb_need_flush |= TLB_NEED_LOCAL_FLUSH;
>  #endif
>      }
>  }

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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