From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43459) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bltCU-00040L-QT for qemu-devel@nongnu.org; Mon, 19 Sep 2016 03:41:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bltCQ-0006tA-Om for qemu-devel@nongnu.org; Mon, 19 Sep 2016 03:41:13 -0400 Date: Mon, 19 Sep 2016 16:35:37 +1000 From: David Gibson Message-ID: <20160919063537.GE20488@umbus> References: <1474023111-11992-1-git-send-email-nikunj@linux.vnet.ibm.com> <1474023111-11992-6-git-send-email-nikunj@linux.vnet.ibm.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="BQPnanjtCNWHyqYD" Content-Disposition: inline In-Reply-To: <1474023111-11992-6-git-send-email-nikunj@linux.vnet.ibm.com> Subject: Re: [Qemu-devel] [PATCH v3 5/5] target-ppc: add lxvb16x and stxvb16x List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Nikunj A Dadhania Cc: qemu-ppc@nongnu.org, rth@twiddle.net, qemu-devel@nongnu.org, benh@kernel.crashing.org --BQPnanjtCNWHyqYD Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Fri, Sep 16, 2016 at 04:21:51PM +0530, Nikunj A Dadhania wrote: > lxvb16x: Load VSX Vector Byte*16 > stxvb16x: Store VSX Vector Byte*16 >=20 > Signed-off-by: Nikunj A Dadhania > --- > target-ppc/translate/vsx-impl.inc.c | 55 +++++++++++++++++++++++++++++++= ++++++ > target-ppc/translate/vsx-ops.inc.c | 2 ++ > 2 files changed, 57 insertions(+) >=20 > diff --git a/target-ppc/translate/vsx-impl.inc.c b/target-ppc/translate/v= sx-impl.inc.c > index 9e7588d..306cc55 100644 > --- a/target-ppc/translate/vsx-impl.inc.c > +++ b/target-ppc/translate/vsx-impl.inc.c > @@ -123,6 +123,33 @@ static void gen_lxvh8x(DisasContext *ctx) > tcg_temp_free(EA); > } > =20 > +static void gen_lxvb16x(DisasContext *ctx) > +{ > + TCGv EA; > + TCGv_i64 xth =3D cpu_vsrh(xT(ctx->opcode)); > + TCGv_i64 xtl =3D cpu_vsrl(xT(ctx->opcode)); > + > + if (unlikely(!ctx->vsx_enabled)) { > + gen_exception(ctx, POWERPC_EXCP_VSXU); > + return; > + } > + gen_set_access_type(ctx, ACCESS_INT); > + EA =3D tcg_temp_new(); > + gen_addr_reg_index(ctx, EA); > + if (ctx->le_mode) { > + tcg_gen_qemu_ld_i64(xth, EA, ctx->mem_idx, MO_BEQ); > + tcg_gen_addi_tl(EA, EA, 8); > + tcg_gen_qemu_ld_i64(xtl, EA, ctx->mem_idx, MO_BEQ); > + } else { > + tcg_gen_qemu_ld_i64(xth, EA, ctx->mem_idx, MO_LEQ); > + gen_helper_deposit32x2(xth, xth); > + tcg_gen_addi_tl(EA, EA, 8); > + tcg_gen_qemu_ld_i64(xtl, EA, ctx->mem_idx, MO_LEQ); > + gen_helper_deposit32x2(xtl, xtl); Again, not correct. Here just a BE load should suffice, you don't need any byte or word swapping at all. The instruction is defined as loading bytes at increasing address into bytes of decreasing significance. This is exactly a big-endian load. > + } > + tcg_temp_free(EA); > +} > + > #define VSX_STORE_SCALAR(name, operation) \ > static void gen_##name(DisasContext *ctx) \ > { \ > @@ -211,6 +238,34 @@ static void gen_stxvh8x(DisasContext *ctx) > tcg_temp_free(EA); > } > =20 > +static void gen_stxvb16x(DisasContext *ctx) > +{ > + TCGv_i64 xsh =3D cpu_vsrh(xS(ctx->opcode)); > + TCGv_i64 xsl =3D cpu_vsrl(xS(ctx->opcode)); > + TCGv EA; > + > + if (unlikely(!ctx->vsx_enabled)) { > + gen_exception(ctx, POWERPC_EXCP_VSXU); > + return; > + } > + gen_set_access_type(ctx, ACCESS_INT); > + EA =3D tcg_temp_new(); > + gen_addr_reg_index(ctx, EA); > + > + if (ctx->le_mode) { > + tcg_gen_qemu_st_i64(xsh, EA, ctx->mem_idx, MO_BEQ); > + tcg_gen_addi_tl(EA, EA, 8); > + tcg_gen_qemu_st_i64(xsl, EA, ctx->mem_idx, MO_BEQ); > + } else { > + gen_helper_deposit32x2(xsh, xsh); > + tcg_gen_qemu_st_i64(xsh, EA, ctx->mem_idx, MO_LEQ); > + tcg_gen_addi_tl(EA, EA, 8); > + gen_helper_deposit32x2(xsl, xsl); > + tcg_gen_qemu_st_i64(xsl, EA, ctx->mem_idx, MO_LEQ); Ditto. > + } > + tcg_temp_free(EA); > +} > + > #define MV_VSRW(name, tcgop1, tcgop2, target, source) \ > static void gen_##name(DisasContext *ctx) \ > { \ > diff --git a/target-ppc/translate/vsx-ops.inc.c b/target-ppc/translate/vs= x-ops.inc.c > index 21f9064..f5afa0f 100644 > --- a/target-ppc/translate/vsx-ops.inc.c > +++ b/target-ppc/translate/vsx-ops.inc.c > @@ -8,6 +8,7 @@ GEN_HANDLER_E(lxvd2x, 0x1F, 0x0C, 0x1A, 0, PPC_NONE, PPC2= _VSX), > GEN_HANDLER_E(lxvdsx, 0x1F, 0x0C, 0x0A, 0, PPC_NONE, PPC2_VSX), > GEN_HANDLER_E(lxvw4x, 0x1F, 0x0C, 0x18, 0, PPC_NONE, PPC2_VSX), > GEN_HANDLER_E(lxvh8x, 0x1F, 0x0C, 0x19, 0, PPC_NONE, PPC2_ISA300), > +GEN_HANDLER_E(lxvb16x, 0x1F, 0x0C, 0x1B, 0, PPC_NONE, PPC2_ISA300), > =20 > GEN_HANDLER_E(stxsdx, 0x1F, 0xC, 0x16, 0, PPC_NONE, PPC2_VSX), > GEN_HANDLER_E(stxsibx, 0x1F, 0xD, 0x1C, 0, PPC_NONE, PPC2_ISA300), > @@ -17,6 +18,7 @@ GEN_HANDLER_E(stxsspx, 0x1F, 0xC, 0x14, 0, PPC_NONE, PP= C2_VSX207), > GEN_HANDLER_E(stxvd2x, 0x1F, 0xC, 0x1E, 0, PPC_NONE, PPC2_VSX), > GEN_HANDLER_E(stxvw4x, 0x1F, 0xC, 0x1C, 0, PPC_NONE, PPC2_VSX), > GEN_HANDLER_E(stxvh8x, 0x1F, 0x0C, 0x1D, 0, PPC_NONE, PPC2_ISA300), > +GEN_HANDLER_E(stxvb16x, 0x1F, 0x0C, 0x1F, 0, PPC_NONE, PPC2_ISA300), > =20 > GEN_HANDLER_E(mfvsrwz, 0x1F, 0x13, 0x03, 0x0000F800, PPC_NONE, PPC2_VSX2= 07), > GEN_HANDLER_E(mtvsrwa, 0x1F, 0x13, 0x06, 0x0000F800, PPC_NONE, PPC2_VSX2= 07), --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson --BQPnanjtCNWHyqYD Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAEBCAAGBQJX34c4AAoJEGw4ysog2bOSFaoQAI/S4fe1A6Lfs4e3sC/qW4T6 YA0qSy419k52zyecLORYqmN8mlv1jQZFR6V27J14AJoQ0w7i4ioNRvHp9Ru2trVM lMfpFPhfU8UuyT4te8YNhCUQHNcYrB3JesYggA1V9nSay7s4ElTp2PjYq9ngJ43N tIFgkJzfFZtckjEqgXBIHu+SfV6WUePL2kzwIMTCE65D3/iPUX+5ifpetVmJ1REp PqTdrk6XB6K2TM4+nm7F5OCpWSR4YW1hcPnJRPyyZJ60yYwA5bBonoy9g7xA6iZ4 zrC6UrHnZFLuPNB5iUcTSMt7Yc197iG5kEnGx6XOKd0Tdt0WOfB5kfFOaJ0842kU l2z+W7HJWFrH4EZhOqoCvTz7q6g+aoMHx3laFU26CmVoUmtgxMXo8LBeSBCuygoe 99D1zwhBIMLmLfG7IIweA3YB4YYha+ImVQvZSXIW0aqCV6KLWXSOyxmbMDhY95jC +/D4XVi5mEikb0DnLoLEVO7fhteg4qMKo1l3sc02lwaeDKoE9FdGBpvaB6QZx+wJ RHYJQOxMqmkvJpjhqbCL13XqJmuRC6cRPE2BLzjg6bsMJnJ/ETctqA/8jEvEP4L5 uN5QAp4rdaV++BQIMpJiDBY/QJX/TCJtyVZar10lo9D5ZmJCcfNQzZ1TsobdbCLK pwtQuZIJ8fc84+MToNZc =OzlO -----END PGP SIGNATURE----- --BQPnanjtCNWHyqYD--