From: David Gibson <david@gibson.dropbear.id.au>
To: Greg Kurz <groug@kaod.org>
Cc: "Cédric Le Goater" <clg@kaod.org>,
"Laurent Vivier" <lvivier@redhat.com>,
thuth@redhat.com, qemu-devel@nongnu.org, qemu-ppc@nongnu.org,
"Gerd Hoffmann" <kraxel@redhat.com>,
dgibson@redhat.com
Subject: Re: [Qemu-devel] [Qemu-ppc] [PATCH v3 1/6] libqos: add PPC64 PCI support
Date: Thu, 6 Oct 2016 14:53:44 +1100 [thread overview]
Message-ID: <20161006035344.GF18733@umbus.fritz.box> (raw)
In-Reply-To: <20161005213306.2cfd30d5@bahia>
[-- Attachment #1: Type: text/plain, Size: 2463 bytes --]
On Wed, Oct 05, 2016 at 09:33:06PM +0200, Greg Kurz wrote:
> On Wed, 5 Oct 2016 09:34:05 +0200
> Greg Kurz <groug@kaod.org> wrote:
> > On Wed, 5 Oct 2016 12:14:05 +1100
> > David Gibson <david@gibson.dropbear.id.au> wrote:
> > [...]
> > You convinced me. The tswaps in qtest.c are toxic and should be removed.
> >
> > Thanks for the clarification.
> >
>
> Rewind. Cedric and I spent the whole day thinking about that, based on
> Peter's inputs. The conclusion is: the qtest accelerator replaces the
> real world CPU and and the test program simulates what the CPU actually
> does when running the guest driver code in a specific situation.
No, I still think Peter is dead wrong, as you can see in my various
replies
"What the CPU actually does" depends on a number of factors which
simply aren't modelled when qtest replaces the cpu, so it's not a
meaningful concept.
> If the guest driver performs a store to the device, and the CPU and
> device have different endianness, cpu_to_xxYY() in the driver code
> boils down to bswapYY(). Doing things like writel(cpu_to_beYY()) in
> the test program is thus wrong since it involves the host endianness,
> and the test program no longer simulates what the real CPU would do.
> The test program must hence do writel(bswapYY()) and send that to
> qtest.
Except that the bswap has to be conditional on whether the guest CPU's
notional endianness is the same as the device or not. So, for say an
LE device that can appear on several platforms what we actually need
writel(guestcpu_to_le32(val)). Except that if host and guest
(notional) endianness are different the result of that conversion
won't *actually* be LE32, it will be a swapped value in anticipation
of the swap back to guest endianness within the writel().
Why not just say what you actually want. We want to write to an LE
device, so writel_le(val);
> If the host endianness differs from the simulated CPU, the value is in
> wrong order and must be byteswapped before being handed over to the memory
> layer.
>
> This explains why qtest calls tswapYY() before cpu_physical_memory_write().
Yes, the tswap() correctly implements an operation with semantics that
are approximately never what you want.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 819 bytes --]
next prev parent reply other threads:[~2016-10-06 3:53 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-28 18:51 [Qemu-devel] [PATCH v3 0/6] tests: enable ohci/uhci/xhci tests on PPC64 Laurent Vivier
2016-09-28 18:51 ` [Qemu-devel] [PATCH v3 1/6] libqos: add PPC64 PCI support Laurent Vivier
2016-09-29 5:27 ` [Qemu-devel] [Qemu-ppc] " David Gibson
2016-10-03 11:23 ` Cédric Le Goater
2016-10-03 11:37 ` Laurent Vivier
2016-10-03 14:03 ` Greg Kurz
2016-10-03 14:14 ` Cédric Le Goater
2016-10-03 17:30 ` Cédric Le Goater
2016-10-04 0:24 ` David Gibson
2016-10-04 6:58 ` Greg Kurz
2016-10-04 7:36 ` Greg Kurz
2016-10-05 1:15 ` David Gibson
2016-10-05 1:14 ` David Gibson
2016-10-05 7:34 ` Greg Kurz
2016-10-05 19:33 ` Greg Kurz
2016-10-06 3:53 ` David Gibson [this message]
2016-10-04 0:22 ` David Gibson
2016-10-04 6:44 ` Greg Kurz
2016-10-04 6:45 ` Cédric Le Goater
2016-09-28 18:51 ` [Qemu-devel] [PATCH v3 2/6] libqos: add PCI management in qtest_vboot()/qtest_shutdown() Laurent Vivier
2016-09-29 5:30 ` [Qemu-devel] [Qemu-ppc] " David Gibson
2016-09-28 18:51 ` [Qemu-devel] [PATCH v3 3/6] libqos: use generic qtest_shutdown() Laurent Vivier
2016-09-29 5:31 ` [Qemu-devel] [Qemu-ppc] " David Gibson
2016-09-28 18:51 ` [Qemu-devel] [PATCH v3 4/6] qtest: evaluate endianness of the target in qtest_init() Laurent Vivier
2016-09-29 5:31 ` [Qemu-devel] [Qemu-ppc] " David Gibson
2016-09-28 18:51 ` [Qemu-devel] [PATCH v3 5/6] qtest: define target cpu endianness conversion functions Laurent Vivier
2016-09-29 5:33 ` [Qemu-devel] [Qemu-ppc] " David Gibson
2016-09-29 7:23 ` Laurent Vivier
2016-09-29 7:27 ` David Gibson
2016-09-28 18:51 ` [Qemu-devel] [PATCH v3 6/6] tests: enable ohci/uhci/xhci tests on PPC64 Laurent Vivier
2016-10-04 13:20 ` [Qemu-devel] [Qemu-ppc] " Thomas Huth
2016-10-04 13:36 ` Laurent Vivier
2016-09-28 19:24 ` [Qemu-devel] [PATCH v3 0/6] " no-reply
2016-09-29 5:35 ` [Qemu-devel] [Qemu-ppc] " David Gibson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20161006035344.GF18733@umbus.fritz.box \
--to=david@gibson.dropbear.id.au \
--cc=clg@kaod.org \
--cc=dgibson@redhat.com \
--cc=groug@kaod.org \
--cc=kraxel@redhat.com \
--cc=lvivier@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
--cc=thuth@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).