From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55920) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bsBNi-0001kd-H4 for qemu-devel@nongnu.org; Thu, 06 Oct 2016 12:18:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bsBNf-0007p9-5z for qemu-devel@nongnu.org; Thu, 06 Oct 2016 12:18:50 -0400 Received: from out1-smtp.messagingengine.com ([66.111.4.25]:35329) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bsBNc-0007k6-KM for qemu-devel@nongnu.org; Thu, 06 Oct 2016 12:18:47 -0400 Date: Thu, 6 Oct 2016 12:18:33 -0400 From: "Emilio G. Cota" Message-ID: <20161006161833.GA31142@flamenco> References: <1475767463-12045-1-git-send-email-pbonzini@redhat.com> <1475767463-12045-6-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1475767463-12045-6-git-send-email-pbonzini@redhat.com> Subject: Re: [Qemu-devel] [PATCH 05/10] qemu-tech: document lazy condition code evaluation in cpu.h List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paolo Bonzini Cc: qemu-devel@nongnu.org On Thu, Oct 06, 2016 at 17:24:18 +0200, Paolo Bonzini wrote: > Unlike the other sections, they are pretty specific to a particular CPU. > > Signed-off-by: Paolo Bonzini > --- > qemu-tech.texi | 25 ------------------------- > target-cris/cpu.h | 7 +++++++ > target-i386/cpu.h | 7 +++++++ > target-m68k/cpu.h | 8 ++++++++ > target-sparc/cpu.h | 5 +++++ > 5 files changed, 27 insertions(+), 25 deletions(-) (snip) > diff --git a/target-cris/cpu.h b/target-cris/cpu.h > index 7d7fe6e..6d3de56 100644 > --- a/target-cris/cpu.h > +++ b/target-cris/cpu.h > @@ -223,6 +223,13 @@ int cpu_cris_signal_handler(int host_signum, void *pinfo, > void cris_initialize_tcg(void); > void cris_initialize_crisv10_tcg(void); > > +/* Instead of computing the condition codes after each x86 instruction, > + * QEMU just stores one operand (called CC_SRC), the result > + * (called CC_DST) and the type of operation (called CC_OP). When the > + * condition codes are needed, the condition codes can be calculated > + * using this information. Condition codes are not generated if they > + * are only needed for conditional branches. > + */ This text doesn't seem to be cris-specific, e.g.: - "each x86 instruction" - CC_SRC (git grep CC_SRC here doesn't return anything) - CC_DST (ditto) > enum { > CC_OP_DYNAMIC, /* Use env->cc_op */ > CC_OP_FLAGS, > diff --git a/target-i386/cpu.h b/target-i386/cpu.h > index 6d028aa..f606f15 100644 > --- a/target-i386/cpu.h > +++ b/target-i386/cpu.h > @@ -698,6 +698,13 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS]; > /* Use a clearer name for this. */ > #define CPU_INTERRUPT_INIT CPU_INTERRUPT_RESET > > +/* Instead of computing the condition codes after each x86 instruction, > + * QEMU just stores one operand (called CC_SRC), the result > + * (called CC_DST) and the type of operation (called CC_OP). When the > + * condition codes are needed, the condition codes can be calculated > + * using this information. Condition codes are not generated if they > + * are only needed for conditional branches. > + */ > typedef enum { > CC_OP_DYNAMIC, /* must use dynamic code to get cc_op */ > CC_OP_EFLAGS, /* all cc are explicitly computed, CC_SRC = flags */ > diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h > index c2d40cb..ccc7157 100644 > --- a/target-m68k/cpu.h > +++ b/target-m68k/cpu.h > @@ -154,6 +154,14 @@ int cpu_m68k_signal_handler(int host_signum, void *pinfo, > void *puc); > void cpu_m68k_flush_flags(CPUM68KState *, int); > > + > +/* Instead of computing the condition codes after each x86 instruction, > + * QEMU just stores one operand (called CC_SRC), the result > + * (called CC_DST) and the type of operation (called CC_OP). When the > + * condition codes are needed, the condition codes can be calculated > + * using this information. Condition codes are not generated if they > + * are only needed for conditional branches. > + */ Same as above: - "each x86 instruction" - no CC_DST Emilio