qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, patches@linaro.org
Subject: Re: [Qemu-devel] [PATCH 1/3] target-arm: Implement dummy MDCCINT_EL1
Date: Thu, 6 Oct 2016 18:55:09 +0200	[thread overview]
Message-ID: <20161006165509.GA28109@toto> (raw)
In-Reply-To: <1475760067-25756-2-git-send-email-peter.maydell@linaro.org>

On Thu, Oct 06, 2016 at 02:21:05PM +0100, Peter Maydell wrote:
> MDCCINT_EL1 is part of the DCC debugger communication
> channel between the CPU and an attached external debugger.
> QEMU doesn't implement this, but since Linux may try
> to access this register we need to provide at least
> a dummy implementation.
> 
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>


> ---
>  target-arm/helper.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/target-arm/helper.c b/target-arm/helper.c
> index 25f612d..23792ab 100644
> --- a/target-arm/helper.c
> +++ b/target-arm/helper.c
> @@ -4060,6 +4060,14 @@ static const ARMCPRegInfo debug_cp_reginfo[] = {
>        .cp = 14, .opc1 = 0, .crn = 0, .crm = 7, .opc2 = 0,
>        .access = PL1_RW, .accessfn = access_tda,
>        .type = ARM_CP_NOP },
> +    /* Dummy MDCCINT_EL1, since we don't implement the Debug Communications
> +     * Channel but Linux may try to access this register. The 32-bit
> +     * alias is DBGDCCINT.
> +     */
> +    { .name = "MDCCINT_EL1", .state = ARM_CP_STATE_BOTH,
> +      .cp = 14, .opc0 = 2, .opc1 = 0, .crn = 0, .crm = 2, .opc2 = 0,
> +      .access = PL1_RW, .accessfn = access_tda,
> +      .type = ARM_CP_NOP },
>      REGINFO_SENTINEL
>  };
>  
> -- 
> 2.7.4
> 

  reply	other threads:[~2016-10-06 16:55 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-10-06 13:21 [Qemu-devel] [PATCH 0/3] preliminaries for GICv3 virt support Peter Maydell
2016-10-06 13:21 ` [Qemu-devel] [PATCH 1/3] target-arm: Implement dummy MDCCINT_EL1 Peter Maydell
2016-10-06 16:55   ` Edgar E. Iglesias [this message]
2016-10-06 13:21 ` [Qemu-devel] [PATCH 2/3] target-arm: Add trace events for the generic timers Peter Maydell
2016-10-06 16:55   ` Edgar E. Iglesias
2016-10-06 13:21 ` [Qemu-devel] [PATCH 3/3] hw/intc/arm_gicv3: Fix ICC register tracepoints Peter Maydell
2016-10-06 16:59 ` [Qemu-devel] [PATCH 0/3] preliminaries for GICv3 virt support Edgar E. Iglesias
2016-10-06 17:48   ` Peter Maydell
2016-10-06 17:59     ` Peter Maydell
2016-10-11  9:15 ` no-reply
2016-10-11  9:19 ` Peter Maydell

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20161006165509.GA28109@toto \
    --to=edgar.iglesias@gmail.com \
    --cc=patches@linaro.org \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).