From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34146) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bsIn9-0000G5-0A for qemu-devel@nongnu.org; Thu, 06 Oct 2016 20:13:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bsIn3-0003Fh-Lm for qemu-devel@nongnu.org; Thu, 06 Oct 2016 20:13:33 -0400 Date: Fri, 7 Oct 2016 10:51:48 +1100 From: David Gibson Message-ID: <20161006235148.GH18490@umbus.fritz.box> References: <1475722987-18644-1-git-send-email-david@gibson.dropbear.id.au> <1475722987-18644-2-git-send-email-david@gibson.dropbear.id.au> <071b0b41-0c16-4be8-a59b-c1296c18eaf8@redhat.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="rCwQ2Y43eQY6RBgR" Content-Disposition: inline In-Reply-To: <071b0b41-0c16-4be8-a59b-c1296c18eaf8@redhat.com> Subject: Re: [Qemu-devel] [RFC 1/4] spapr_pci: Delegate placement of PCI host bridges to machine type List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Laurent Vivier Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, benh@kernel.crashing.org, thuth@redhat.com, agraf@suse.de, mst@redhat.com, aik@ozlabs.ru, mdroth@linux.vnet.ibm.com, nikunj@linux.vnet.ibm.com, bharata@linux.vnet.ibm.com, abologna@redhat.com, mpolednik@redhat.com --rCwQ2Y43eQY6RBgR Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Thu, Oct 06, 2016 at 11:36:12AM +0200, Laurent Vivier wrote: >=20 >=20 > On 06/10/2016 05:03, David Gibson wrote: > > The 'spapr-pci-host-bridge' represents the virtual PCI host bridge (PHB) > > for a PAPR guest. Unlike on x86, it's routine on Power (both bare metal > > and PAPR guests) to have numerous independent PHBs, each controlling a > > separate PCI domain. > >=20 > > There are two ways of configuring the spapr-pci-host-bridge device: fir= st > > it can be done fully manually, specifying the locations and sizes of all > > the IO windows. This gives the most control, but is very awkward with 6 > > mandatory parameters. Alternatively just an "index" can be specified > > which essentially selects from an array of predefined PHB locations. > > The PHB at index 0 is automatically created as the default PHB. > >=20 > > The current set of default locations causes some problems for guests wi= th > > large RAM (> 1 TiB) or PCI devices with very large BARs (e.g. big nVidia > > GPGPU cards via VFIO). Obviously, for migration we can only change the > > locations on a new machine type, however. > >=20 > > This is awkward, because the placement is currently decided within the > > spapr-pci-host-bridge code, so it breaks abstraction to look inside the > > machine type version. > >=20 > > So, this patch delegates the "default mode" PHB placement from the > > spapr-pci-host-bridge device back to the machine type via a public meth= od > > in sPAPRMachineClass. It's still a bit ugly, but it's about the best we > > can do. > >=20 > > For now, this just changes where the calculation is done. It doesn't > > change the actual location of the host bridges, or any other behaviour. > >=20 > > Signed-off-by: David Gibson > > --- > > hw/ppc/spapr.c | 34 ++++++++++++++++++++++++++++++++++ > > hw/ppc/spapr_pci.c | 22 ++++++++-------------- > > include/hw/pci-host/spapr.h | 11 +---------- > > include/hw/ppc/spapr.h | 4 ++++ > > 4 files changed, 47 insertions(+), 24 deletions(-) > >=20 > > diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c > > index 03e3803..f6e9c2a 100644 > > --- a/hw/ppc/spapr.c > > +++ b/hw/ppc/spapr.c > > @@ -2370,6 +2370,39 @@ static HotpluggableCPUList *spapr_query_hotplugg= able_cpus(MachineState *machine) > > return head; > > } > > =20 > > +static void spapr_phb_placement(sPAPRMachineState *spapr, uint32_t ind= ex, > > + uint64_t *buid, hwaddr *pio, hwaddr *p= io_size, > > + hwaddr *mmio, hwaddr *mmio_size, > > + unsigned n_dma, uint32_t *liobns, Erro= r **errp) > > +{ > > + const uint64_t base_buid =3D 0x800000020000000ULL; > > + const hwaddr phb0_base =3D 0x10000000000ULL; /* 1 TiB */ > > + const hwaddr phb_spacing =3D 0x1000000000ULL; /* 64 GiB */ > > + const hwaddr mmio_offset =3D 0xa0000000; /* 2 GiB + 512 MiB */ > > + const hwaddr pio_offset =3D 0x80000000; /* 2 GiB */ > > + const uint32_t max_index =3D 255; > > + > > + hwaddr phb_base; > > + int i; > > + > > + if (index > max_index) { > > + error_setg(errp, "\"index\" for PAPR PHB is too large (max %u)= ", > > + max_index); > > + return; > > + } > > + > > + *buid =3D base_buid + index; > > + for (i =3D 0; i < n_dma; ++i) { > > + liobns[i] =3D SPAPR_PCI_LIOBN(index, i); > > + } > > + > > + phb_base =3D phb0_base + index * phb_spacing; > > + *pio =3D phb_base + pio_offset; > > + *pio_size =3D SPAPR_PCI_IO_WIN_SIZE; > > + *mmio =3D phb_base + mmio_offset; > > + *mmio_size =3D SPAPR_PCI_MMIO_WIN_SIZE; > > +} > > + > > static void spapr_machine_class_init(ObjectClass *oc, void *data) > > { > > MachineClass *mc =3D MACHINE_CLASS(oc); > > @@ -2406,6 +2439,7 @@ static void spapr_machine_class_init(ObjectClass = *oc, void *data) > > mc->query_hotpluggable_cpus =3D spapr_query_hotpluggable_cpus; > > fwc->get_dev_path =3D spapr_get_fw_dev_path; > > nc->nmi_monitor_handler =3D spapr_nmi; > > + smc->phb_placement =3D spapr_phb_placement; > > } > > =20 > > static const TypeInfo spapr_machine_info =3D { > > diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c > > index 4f00865..c0fc964 100644 > > --- a/hw/ppc/spapr_pci.c > > +++ b/hw/ppc/spapr_pci.c > > @@ -1311,7 +1311,8 @@ static void spapr_phb_realize(DeviceState *dev, E= rror **errp) > > sphb->ddw_enabled ? SPAPR_PCI_DMA_MAX_WINDOWS : 1; > > =20 > > if (sphb->index !=3D (uint32_t)-1) { > > - hwaddr windows_base; > > + sPAPRMachineClass *smc =3D SPAPR_MACHINE_GET_CLASS(spapr); > > + Error *local_err =3D NULL; > > =20 > > if ((sphb->buid !=3D (uint64_t)-1) || (sphb->dma_liobn[0] !=3D= (uint32_t)-1) > > || (sphb->dma_liobn[1] !=3D (uint32_t)-1 && windows_suppor= ted =3D=3D 2) > > @@ -1322,21 +1323,14 @@ static void spapr_phb_realize(DeviceState *dev,= Error **errp) > > return; > > } > > =20 > > - if (sphb->index > SPAPR_PCI_MAX_INDEX) { > > - error_setg(errp, "\"index\" for PAPR PHB is too large (max= %u)", > > - SPAPR_PCI_MAX_INDEX); > > + smc->phb_placement(spapr, sphb->index, > > + &sphb->buid, &sphb->io_win_addr, &sphb->io_= win_size, > > + &sphb->mem_win_addr, &sphb->mem_win_size, > > + windows_supported, sphb->dma_liobn, &local_= err); >=20 >=20 > Why don't you pass "sphb" instead of "&sphb->buid, &sphb->io_win_addr, > &sphb->io_win_size, &sphb->mem_win_addr, &sphb->mem_win_size, > sphb->dma_liobn"? >=20 > Something like: >=20 > smc->phb_placement(spapr, sphb, windows_supported, &local_err); I thought about that, but I wasn't sure if it was safe for something external to go setting properties on the PHB object while it was in the middle of realize(). --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson --rCwQ2Y43eQY6RBgR Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAEBCAAGBQJX9uOUAAoJEGw4ysog2bOS1EwP+QF1GXgDc0z2mC6Gb3RA7Pr8 Qd1skaf3XQqjERUMZayEY2AyXAaTjI4IpnDvd/0m8SnOOYjRyDZaWXdi1vSbyEdO ef94grBhA7EXmFadqiqm9KOIHgLgeqAlpRkYbdmBT/79mkZ967A7kbrP/hnlK5hR U5TPuJ8ZDuWU0/Bc4XeKjmXS8eJB/USvVKQq0AIMTFEz8Dn1yx12E7wHmoqetTX6 PyS1Gm7nrcMhAGyepgRCQJs9JBTh2uLqhsFbLEAgis/LEiGw6zKTwb4gi6ZUewJX Q3Qin/DwzAlciFXNhDpm0Kd1e9Hr5FK4HlIeFrBmIfF86vl5bbOS3ew5ehwOMjw2 sXMNJhLG7OpULuLaDqOugdpWKS/ywwA0OeD+3vE6eYGZEcFBZ5+NPAxUBPrlye4x xqTsITyzJoKSrzSdMypE3EIkM2aa0J2CnQank2vo1TDoOPpghvvISk73A2LTxKjH /GMC3bDe5AQ4ntvP4WwI/4YWQx4wgTmCZYqORst74jlj8T4afns1qBwRGoP1lbr8 AJ0eBcOHHFz8eII03OgljaytbfJJIHZMXz/2xrmF9pYtQAUTNmNjp3yxygu46MEJ /RjUmKsa10GY0FoNF7n8aCSMYm5DWCkHKnAw2MLPt548Ajdd2ysbyWCN8/kt3u3w JEtCm5kQ/ONpV5ETxOnB =KVGy -----END PGP SIGNATURE----- --rCwQ2Y43eQY6RBgR--