From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44086) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1btxZ3-0002EZ-Ew for qemu-devel@nongnu.org; Tue, 11 Oct 2016 09:57:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1btxZ2-0003Pp-Ds for qemu-devel@nongnu.org; Tue, 11 Oct 2016 09:57:53 -0400 Date: Tue, 11 Oct 2016 21:24:52 +1100 From: David Gibson Message-ID: <20161011102452.GH8952@umbus.fritz.box> References: <1475479496-16158-1-git-send-email-clg@kaod.org> <1475479496-16158-4-git-send-email-clg@kaod.org> <20161007043221.GS18490@umbus.fritz.box> <45ecd367-07ce-e143-cf53-e7332cc94ac2@kaod.org> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="7J16OGEJ/mt06A90" Content-Disposition: inline In-Reply-To: <45ecd367-07ce-e143-cf53-e7332cc94ac2@kaod.org> Subject: Re: [Qemu-devel] [PATCH v4 03/20] ppc/pnv: add a core mask to PnvChip List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?iso-8859-1?Q?C=E9dric?= Le Goater Cc: qemu-ppc@nongnu.org, Benjamin Herrenschmidt , qemu-devel@nongnu.org --7J16OGEJ/mt06A90 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Oct 10, 2016 at 02:56:25PM +0200, C=E9dric Le Goater wrote: >=20 > >> @@ -227,11 +227,44 @@ static void ppc_powernv_init(MachineState *machi= ne) > >> snprintf(chip_name, sizeof(chip_name), "chip[%d]", CHIP_HWID(= i)); > >> object_property_add_child(OBJECT(pnv), chip_name, chip, &erro= r_fatal); > >> object_property_set_int(chip, CHIP_HWID(i), "chip-id", &error= _fatal); > >> + object_property_set_int(chip, smp_cores, "nr-cores", &error_f= atal); > >> + /* > >> + * We could customize cores_mask for the chip here. May be > >> + * using a powernv machine property, like 'num-chips'. Let the > >> + * chip choose the default for now. > >=20 > > I don't think you need any special mechanism for this. If you just > > remove this explicit assignment the chip default will apply, but the > > user can alter it using -global. >=20 > Using a command line with : >=20 > -global powernv-chip-POWER8.cores-mask=3D0x7070 >=20 > would work for one chip but not for more. Let's start with that, I will= =20 > remove the comment for now. multiple chip is for later. Well, it works for more than one chip if you want the same mask for each of them. If you want different masks, I think you can still do it with -set, but working out the right arguments can be a PITA. --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson --7J16OGEJ/mt06A90 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAEBCAAGBQJX/L30AAoJEGw4ysog2bOSvCMP/1Y+ndVql9+1Cciyvz/7pt8F y4JVFAwHNIuCfkyPrumyUqtzRZBvRjDV612GnWfmctVjb/g9hqbM7O2cctkVnulf Oar/GXv5kHy6uCkwiczYWHwX9m6pVvL4o/dUk471pfxSbpff5Ca8dZ/YNQRco0DR ZjOKOY431Qs+N0nKtvBnRkPRH8ppMNgQXsm93v3xrVGM/mWZyxqi2NLuOa/Z7QAn z9LfiPaq7+uBtUyLaHmhS5T0nI16CakaGuHv71+OrMHySjRNWWYToZCZyRM0xadE 2CR9Ng+VdQ4p9QkKP5FOSccR9ivl6QP5TsI4iJkfrF0u9ogBcPPBecsesLLOlw2B 9DBggL7QAPJMtOIZBQTzcDEtUPhRCKBmf2K+YdOg4o5qGnYTX1hHhabLW7BaALbx zRj+2nJZW/J1vDE88mYE+MF5vT2woYQw7bXvO1WRpPvZevcFXvJafPDB0hg8xW4/ t448FYmr0TK4dCv5YkfmG74dYIUWP2wnXfuGFfNWrojkC71ZJ24/jPs2uS8l+83J 7iVVx6q2ky6HOf4g50eZh5+cH49hW4B8WOovtSdAQeFuLJMDmrAuA3TQIusoewZU e9Z3Tad+XJfHtaoFj1N7llNV9JTzF2lr0TqS3KL6hUV1gZlM2SLZMX3iI4DHTRNq Di9k8LEOYyZC43EIstD+ =khia -----END PGP SIGNATURE----- --7J16OGEJ/mt06A90--