From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55831) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bwC9i-0005NE-0H for qemu-devel@nongnu.org; Mon, 17 Oct 2016 13:56:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bwC9e-00046h-PS for qemu-devel@nongnu.org; Mon, 17 Oct 2016 13:56:58 -0400 Received: from out1-smtp.messagingengine.com ([66.111.4.25]:40645) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1bwC9e-00046T-M5 for qemu-devel@nongnu.org; Mon, 17 Oct 2016 13:56:54 -0400 Date: Mon, 17 Oct 2016 13:56:53 -0400 From: "Emilio G. Cota" Message-ID: <20161017175653.GA12910@flamenco> References: <1476214861-31658-1-git-send-email-rth@twiddle.net> <20161016223837.GB5587@flamenco> <87lgxnfkyo.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <87lgxnfkyo.fsf@linaro.org> Subject: Re: [Qemu-devel] [PATCH v6 00/35] cmpxchg-based emulation of atomics List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alex =?iso-8859-1?Q?Benn=E9e?= Cc: Richard Henderson , qemu-devel@nongnu.org On Mon, Oct 17, 2016 at 09:17:35 +0100, Alex Bennée wrote: > > Emilio G. Cota writes: > > > On Tue, Oct 11, 2016 at 14:40:26 -0500, Richard Henderson wrote: > >> Sixth time is the charm, right? This time I'm certain that it > >> compiles with centos6, and contains the previously missing update > >> from Emilio to atomic_add-bench. > > > > For patches 03-16 (including the elusive patch 06 for which I reviewed 1bfe0cdf8 > > from your atomic-4 branch on github): > > > > Reviewed-by: Emilio G. Cota > > > > I just tested the patchset by running concurrencykit's ck_pr regression test (which > > tests lock'ed ops) for [guest-on-host bits, all x86] 64-on-64, 32-on-32 and > > 64-on-32. I ran it with TCG debugging enabled. It passes all tests. > > How odd, did you not see the double temp free for target-arm/translate.c? My tests were x86-only, for both guest and host: > > tests lock'ed ops) for [guest-on-host bits, all x86] 64-on-64, 32-on-32 and ^^^^^^^ Sorry for not being clearer. I have not tested the ARM bits. I just tested aarch64 and it works, though. I put the scripts online so that others can easily generate natively the ck_pr tests. If you have an architecture I don't have access to (e.g. ARM, Alpha), please send me the resulting tarball (the ck_pr.sh script takes care of everything) and I'll upload it with the others: http://braap.org/qemu/ck/ Thanks, Emilio