From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35033) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bx7K5-0007eJ-MP for qemu-devel@nongnu.org; Thu, 20 Oct 2016 02:59:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bx7K2-0002TE-Lg for qemu-devel@nongnu.org; Thu, 20 Oct 2016 02:59:29 -0400 From: Nicholas Piggin Date: Thu, 20 Oct 2016 17:59:09 +1100 Message-Id: <20161020065912.16132-1-npiggin@gmail.com> Subject: [Qemu-devel] (no subject) List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Nicholas Piggin , qemu-ppc@nongnu.org, Alexey Kardashevskiy , David Gibson , Alexander Graf Date: Thu, 20 Oct 2016 17:38:24 +1100 Subject: [PATCH 0/3] ppc: system reset interrupt fixes and new hcall IPI Hi, We are implementing this new unmaskable IPI hcall for crash dumping and debugging. I had some issues with QEMU delivering system reset interrupt to guests, which was caused by the HV bit being set. After changing that, the interrupt was being handled okay. Should there be a more general check to ensure the HV bit is not set in the guest? I implemented Linux support for the new hcall in crashdump code, and it works. Thanks, Nick Nicholas Piggin (3): ppc: fix MSR_ME handling for system reset interrupt ppc: allow system reset interrupt to be delivered to guests ppc/spapr: implement H_SIGNAL_SYS_RESET hw/ppc/spapr_hcall.c | 42 ++++++++++++++++++++++++++++++++++++++++++ include/hw/ppc/spapr.h | 8 +++++++- target-ppc/excp_helper.c | 10 +++++++--- 3 files changed, 56 insertions(+), 4 deletions(-) -- 2.9.3