From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57429) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bxOVE-0004Cm-72 for qemu-devel@nongnu.org; Thu, 20 Oct 2016 21:20:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bxOVD-0004CP-59 for qemu-devel@nongnu.org; Thu, 20 Oct 2016 21:20:08 -0400 Received: from ozlabs.org ([2401:3900:2:1::2]:45815) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1bxOVC-0003su-Fu for qemu-devel@nongnu.org; Thu, 20 Oct 2016 21:20:07 -0400 Date: Fri, 21 Oct 2016 11:50:05 +1100 From: David Gibson Message-ID: <20161021005005.GV11140@umbus.fritz.box> References: <1476719064-9242-1-git-send-email-bd.aviv@gmail.com> <20161017100736.68a56fd9@t450s.home> <20161020140608.0f373ea9@t450s.home> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="hFEw+uh9kF5V6COn" Content-Disposition: inline In-Reply-To: <20161020140608.0f373ea9@t450s.home> Subject: Re: [Qemu-devel] [PATCH v4 RESEND 0/3] IOMMU: intel_iommu support map and unmap notifications List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alex Williamson Cc: "Aviv B.D." , qemu-devel@nongnu.org, "Michael S. Tsirkin" , Peter Xu , Jan Kiszka --hFEw+uh9kF5V6COn Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Thu, Oct 20, 2016 at 02:06:08PM -0600, Alex Williamson wrote: > [cc +david] >=20 > On Thu, 20 Oct 2016 22:17:18 +0300 > "Aviv B.D." wrote: >=20 > > On Mon, Oct 17, 2016 at 7:07 PM, Alex Williamson > > wrote: =20 > >=20 > > > On Mon, 17 Oct 2016 18:44:21 +0300 > > > "Aviv B.D" wrote: > > > =20 > > > > From: "Aviv Ben-David" > > > > > > > > * Advertize Cache Mode capability in iommu cap register. > > > > This capability is controlled by "cache-mode" property of intel-i= ommu =20 > > > device. =20 > > > > To enable this option call QEMU with "-device =20 > > > intel-iommu,cache-mode=3Dtrue". =20 > > > > > > > > * On page cache invalidation in intel vIOMMU, check if the domain b= elong =20 > > > to =20 > > > > registered notifier, and notify accordingly. > > > > > > > > Currently this patch still doesn't enabling VFIO devices support wi= th =20 > > > vIOMMU =20 > > > > present. Current problems: > > > > * vfio_iommu_map_notify is not aware about memory range belong to = =20 > > > specific =20 > > > > VFIOGuestIOMMU. =20 > > > > > > Could you elaborate on why this is an issue? > > > =20 > >=20 > > In my setup the VFIO registered two memory areas with one page of > > unregistered memory > > between them. > >=20 > > When I'm calling memory_region_notify_iommu it calls the notifier funct= ion > > of VFIO twice > > when the second time is failing with warning to console as the new mapp= ing > > is already present. > >=20 > > The notifier function of VFIO should ignore IOMMUTLBEntry that is not in > > the correct > > range. >=20 > Hmm, right vfio_listener_region_add() is called for a > MemoryRegionSection, but then we add an iommu notifier to the > MemoryRegion, so we end up with a notifier per MemoryRegionSection > regardless of whether they're backed by the same MemoryRegion. Seems > like we need a MemoryRegion based list of VFIOGuestIOMMUs so we only > register once per MemoryRegion and then sort though the list of > VFIOGuestIOMMUs for a given MemoryRegion to find the one affected. > David, does that sound right to you? Well, I think that would work. But I think it would be better to fix it from the other side: We add the range to be notified into the IOMMUNotifier structure and filter based on that range in memory_region_notify_iommu. It means a little more list searching and filtering on notify, but it avoids having to have another list and search on the VFIO side. I think it will also better deal with cases where part of an IOMMU mapped region is inaccessible due to an intermediate bridge. > I am curious why you get two regions separated by one page, can you > give an example of the ranges for each? Thanks, >=20 > Alex >=20 --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson --hFEw+uh9kF5V6COn Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAEBCAAGBQJYCWY6AAoJEGw4ysog2bOSVLgQANuXj6/1VMcePTZXxzAUoqFH 3GOHlbAoZDcFhws397cOP/odqpxu9iLUsarsayFWapljoDcl9X/AHoSG4pftnTW1 i8L37E7CcW0hk04jtvLVI8msEe5iLciOAv5yCCNKbFmOrL8EaFviOaQJ2hqn1LMF hxRpM5Fa5Rm7CuUVEV0iv7EAIuYfeMNpf0wh68r86r9nEtqrBiSHVX2RKd8yj6H8 ZZwAwMN+ohZCA/J1kalhrcknyMFvRREO80RNVc1YFigMEOF48dWJUf37y05TiyKB ZHpJpyRSXVaJkCZcv4igaxsRk+6ixnWyaOpJMiZ3ejx/TGlwkFKGo87ntubPCg5n vf7DIVebrgHzN4wIzFVR42B2KaYK4i1aEcFvb9H16iOMxfV+ejc2vPxnRH4dFBOD CBZDFPxCtQRZYOWA1ZRApMDkV5GCM+J15cOSXhso+F7s8/D6JIpXlTyrBV3YvIsn i0DmzJZKCffl1D3tTy9j19RNoZJjq4ZvBHWGi167NMZF9Nw9ZxDjedFsOB3x1o5o kL/oY4Q0Vqh5/lNgZUa5QYdGBUiEPtVCza2n2Rb64W76w7fscMNMXUPkgmx9xh01 5r8lXwsdQ+ZbsOOtR3BkcLJlA0WmVtYf+ZMPd09a6QFE7R2PvCCWSnVLPvOsdMVj JqFvyaIuwmaK/q7ITpMJ =Azag -----END PGP SIGNATURE----- --hFEw+uh9kF5V6COn--