From: David Gibson <david@gibson.dropbear.id.au>
To: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Cc: qemu-ppc@nongnu.org, rth@twiddle.net, qemu-devel@nongnu.org,
bharata@linux.vnet.ibm.com, sandipandas1990@gmail.com,
ego@linux.vnet.ibm.com
Subject: Re: [Qemu-devel] [PATCH v2 4/6] target-ppc: add vrldnm and vrlwnm instructions
Date: Thu, 27 Oct 2016 14:39:15 +1100 [thread overview]
Message-ID: <20161027033915.GM19918@umbus.fritz.box> (raw)
In-Reply-To: <1477463189-26971-5-git-send-email-nikunj@linux.vnet.ibm.com>
[-- Attachment #1: Type: text/plain, Size: 6302 bytes --]
On Wed, Oct 26, 2016 at 11:56:27AM +0530, Nikunj A Dadhania wrote:
> From: Bharata B Rao <bharata@linux.vnet.ibm.com>
>
> vrldnm: Vector Rotate Left Doubleword then AND with Mask
> vrlwnm: Vector Rotate Left Word then AND with Mask
>
> Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
> Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
With the caveat that I'd like to see the previous patch it's based on
share, rather than duplicate the mask generation with translate.c
> ---
> disas/ppc.c | 2 ++
> target-ppc/helper.h | 2 ++
> target-ppc/int_helper.c | 14 ++++++++++----
> target-ppc/translate/vmx-impl.inc.c | 6 ++++++
> target-ppc/translate/vmx-ops.inc.c | 4 ++--
> 5 files changed, 22 insertions(+), 6 deletions(-)
>
> diff --git a/disas/ppc.c b/disas/ppc.c
> index 32f0d8d..bd05623 100644
> --- a/disas/ppc.c
> +++ b/disas/ppc.c
> @@ -2287,7 +2287,9 @@ const struct powerpc_opcode powerpc_opcodes[] = {
> { "vrlw", VX(4, 132), VX_MASK, PPCVEC, { VD, VA, VB } },
> { "vrsqrtefp", VX(4, 330), VX_MASK, PPCVEC, { VD, VB } },
> { "vrldmi", VX(4, 197), VX_MASK, PPCVEC, { VD, VA, VB } },
> +{ "vrldnm", VX(4, 453), VX_MASK, PPCVEC, { VD, VA, VB } },
> { "vrlwmi", VX(4, 133), VX_MASK, PPCVEC, { VD, VA, VB} },
> +{ "vrlwnm", VX(4, 389), VX_MASK, PPCVEC, { VD, VA, VB } },
> { "vsel", VXA(4, 42), VXA_MASK, PPCVEC, { VD, VA, VB, VC } },
> { "vsl", VX(4, 452), VX_MASK, PPCVEC, { VD, VA, VB } },
> { "vslb", VX(4, 260), VX_MASK, PPCVEC, { VD, VA, VB } },
> diff --git a/target-ppc/helper.h b/target-ppc/helper.h
> index 9fb8f0d..d6ee26e 100644
> --- a/target-ppc/helper.h
> +++ b/target-ppc/helper.h
> @@ -327,6 +327,8 @@ DEF_HELPER_3(vrefp, void, env, avr, avr)
> DEF_HELPER_3(vrsqrtefp, void, env, avr, avr)
> DEF_HELPER_3(vrlwmi, void, avr, avr, avr)
> DEF_HELPER_3(vrldmi, void, avr, avr, avr)
> +DEF_HELPER_3(vrldnm, void, avr, avr, avr)
> +DEF_HELPER_3(vrlwnm, void, avr, avr, avr)
> DEF_HELPER_5(vmaddfp, void, env, avr, avr, avr, avr)
> DEF_HELPER_5(vnmsubfp, void, env, avr, avr, avr, avr)
> DEF_HELPER_3(vexptefp, void, env, avr, avr)
> diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c
> index b54cd7c..0fd92ed 100644
> --- a/target-ppc/int_helper.c
> +++ b/target-ppc/int_helper.c
> @@ -1741,7 +1741,7 @@ static inline uint##size##_t mask_u##size(uint##size##_t start, \
> MASK(32, UINT32_MAX);
> MASK(64, UINT64_MAX);
>
> -#define VRLMI(name, size, element) \
> +#define VRLMI(name, size, element, insert) \
> void helper_##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
> { \
> int i; \
> @@ -1756,12 +1756,18 @@ void helper_##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
> begin = extract##size(src2, 16, 6); \
> rot_val = rol##size(src1, shift); \
> mask = mask_u##size(begin, end); \
> - r->element[i] = (rot_val & mask) | (src3 & ~mask); \
> + if (insert) { \
> + r->element[i] = (rot_val & mask) | (src3 & ~mask); \
> + } else { \
> + r->element[i] = (rot_val & mask); \
> + } \
> } \
> }
>
> -VRLMI(vrldmi, 64, u64);
> -VRLMI(vrlwmi, 32, u32);
> +VRLMI(vrldmi, 64, u64, 1);
> +VRLMI(vrlwmi, 32, u32, 1);
> +VRLMI(vrldnm, 64, u64, 0);
> +VRLMI(vrlwnm, 32, u32, 0);
>
> void helper_vsel(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b,
> ppc_avr_t *c)
> diff --git a/target-ppc/translate/vmx-impl.inc.c b/target-ppc/translate/vmx-impl.inc.c
> index fdfbd6a..500c43f 100644
> --- a/target-ppc/translate/vmx-impl.inc.c
> +++ b/target-ppc/translate/vmx-impl.inc.c
> @@ -442,6 +442,9 @@ GEN_VXFORM(vmulesw, 4, 14);
> GEN_VXFORM(vslb, 2, 4);
> GEN_VXFORM(vslh, 2, 5);
> GEN_VXFORM(vslw, 2, 6);
> +GEN_VXFORM(vrlwnm, 2, 6);
> +GEN_VXFORM_DUAL(vslw, PPC_ALTIVEC, PPC_NONE, \
> + vrlwnm, PPC_NONE, PPC2_ISA300)
> GEN_VXFORM(vsld, 2, 23);
> GEN_VXFORM(vsrb, 2, 8);
> GEN_VXFORM(vsrh, 2, 9);
> @@ -496,6 +499,9 @@ GEN_VXFORM(vrldmi, 2, 3);
> GEN_VXFORM_DUAL(vrld, PPC_NONE, PPC2_ALTIVEC_207, \
> vrldmi, PPC_NONE, PPC2_ISA300)
> GEN_VXFORM(vsl, 2, 7);
> +GEN_VXFORM(vrldnm, 2, 7);
> +GEN_VXFORM_DUAL(vsl, PPC_ALTIVEC, PPC_NONE, \
> + vrldnm, PPC_NONE, PPC2_ISA300)
> GEN_VXFORM(vsr, 2, 11);
> GEN_VXFORM_ENV(vpkuhum, 7, 0);
> GEN_VXFORM_ENV(vpkuwum, 7, 1);
> diff --git a/target-ppc/translate/vmx-ops.inc.c b/target-ppc/translate/vmx-ops.inc.c
> index 76b3593..a5ad4d4 100644
> --- a/target-ppc/translate/vmx-ops.inc.c
> +++ b/target-ppc/translate/vmx-ops.inc.c
> @@ -107,7 +107,7 @@ GEN_VXFORM(vmulesh, 4, 13),
> GEN_VXFORM_207(vmulesw, 4, 14),
> GEN_VXFORM(vslb, 2, 4),
> GEN_VXFORM(vslh, 2, 5),
> -GEN_VXFORM(vslw, 2, 6),
> +GEN_VXFORM_DUAL(vslw, vrlwnm, 2, 6, PPC_ALTIVEC, PPC_NONE),
> GEN_VXFORM_207(vsld, 2, 23),
> GEN_VXFORM(vsrb, 2, 8),
> GEN_VXFORM(vsrh, 2, 9),
> @@ -145,7 +145,7 @@ GEN_VXFORM(vrlb, 2, 0),
> GEN_VXFORM(vrlh, 2, 1),
> GEN_VXFORM_DUAL(vrlw, vrlwmi, 2, 2, PPC_ALTIVEC, PPC_NONE),
> GEN_VXFORM_DUAL(vrld, vrldmi, 2, 3, PPC_NONE, PPC2_ALTIVEC_207),
> -GEN_VXFORM(vsl, 2, 7),
> +GEN_VXFORM_DUAL(vsl, vrldnm, 2, 7, PPC_ALTIVEC, PPC_NONE),
> GEN_VXFORM(vsr, 2, 11),
> GEN_VXFORM(vpkuhum, 7, 0),
> GEN_VXFORM(vpkuwum, 7, 1),
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 819 bytes --]
next prev parent reply other threads:[~2016-10-27 4:24 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-26 6:26 [Qemu-devel] [PATCH v2 0/6] POWER9 TCG enablements - part7 Nikunj A Dadhania
2016-10-26 6:26 ` [Qemu-devel] [PATCH v2 1/6] target-ppc: add xscmp[eq, gt, ge, ne]dp instructions Nikunj A Dadhania
2016-10-27 3:34 ` David Gibson
2016-10-26 6:26 ` [Qemu-devel] [PATCH v2 2/6] bitops: fix rol/ror when shift is zero Nikunj A Dadhania
2016-10-26 15:20 ` Richard Henderson
2016-10-27 3:51 ` David Gibson
2016-10-30 2:57 ` Nikunj A Dadhania
2016-10-26 6:26 ` [Qemu-devel] [PATCH v2 3/6] target-ppc: add vrldnmi and vrlwmi instructions Nikunj A Dadhania
2016-10-27 3:38 ` David Gibson
2016-10-27 8:33 ` Nikunj A Dadhania
2016-10-28 1:30 ` David Gibson
2016-10-28 16:28 ` Richard Henderson
2016-10-26 6:26 ` [Qemu-devel] [PATCH v2 4/6] target-ppc: add vrldnm and vrlwnm instructions Nikunj A Dadhania
2016-10-27 3:39 ` David Gibson [this message]
2016-10-26 6:26 ` [Qemu-devel] [PATCH v2 5/6] target-ppc: add vprtyb[w/d/q] instructions Nikunj A Dadhania
2016-10-27 3:47 ` David Gibson
2016-10-27 5:22 ` Richard Henderson
2016-10-27 8:36 ` Nikunj A Dadhania
2016-10-27 14:16 ` Richard Henderson
2016-10-28 1:34 ` David Gibson
2016-10-27 13:28 ` David Gibson
2016-10-26 6:26 ` [Qemu-devel] [PATCH v2 6/6] target-ppc: Add xvcmpnesp, xvcmpnedp instructions Nikunj A Dadhania
2016-10-27 3:50 ` David Gibson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20161027033915.GM19918@umbus.fritz.box \
--to=david@gibson.dropbear.id.au \
--cc=bharata@linux.vnet.ibm.com \
--cc=ego@linux.vnet.ibm.com \
--cc=nikunj@linux.vnet.ibm.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
--cc=rth@twiddle.net \
--cc=sandipandas1990@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).