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From: David Gibson <david@gibson.dropbear.id.au>
To: Richard Henderson <rth@twiddle.net>
Cc: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>,
	qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
	bharata@linux.vnet.ibm.com, sandipandas1990@gmail.com,
	ego@linux.vnet.ibm.com, Ankit Kumar <ankit@linux.vnet.ibm.com>
Subject: Re: [Qemu-devel] [PATCH v2 5/6] target-ppc: add vprtyb[w/d/q] instructions
Date: Fri, 28 Oct 2016 12:34:21 +1100	[thread overview]
Message-ID: <20161028013421.GE19349@umbus.fritz.box> (raw)
In-Reply-To: <b88da6b8-6b73-ce33-570d-b28b7a6d104b@twiddle.net>

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On Thu, Oct 27, 2016 at 07:16:24AM -0700, Richard Henderson wrote:
> On 10/27/2016 01:36 AM, Nikunj A Dadhania wrote:
> > Right, it does reduce number of operations:
> > 
> > +#define SIZE_MASK(x) ((1ULL << (x)) - 1)
> > +static uint64_t vparity(uint64_t f1, uint64_t f2, int size)
> > +{
> > +    uint64_t res = f1 ^ f2;
> > +    if (size == 8) return res;
> > +    return vparity(res & SIZE_MASK(size/2), res >> (size/2), size/2);
> > +}
> 
> Why are you using recursion for something that should be 5 operations?
> You're making this more complicated than it needs to be.
> 
>   uint64_t res = b->u64[0] ^ b->u64[1];
>   res ^= res >> 32;
>   res ^= res >> 16;
>   res ^= res >> 8;
>   r->u64[LO_IDX] = res & 1;

We do need to implement it at multiple sizes, which makes it a bit
more complex.  But I wonder if it makes sense to do this without a
helper, something like

gen_vprty()
{
    ...
    gen(shift right 8)
    gen(xor)
    if (size > 2)
       gen(shift right 16)
       gen(xor)
    if (size > 4)
       gen(shift right 32)
       gen(xor)
    if (size > 8)
       gen(xor hi and low words)
    gen(mask result bits)
}

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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  reply	other threads:[~2016-10-28  1:38 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-10-26  6:26 [Qemu-devel] [PATCH v2 0/6] POWER9 TCG enablements - part7 Nikunj A Dadhania
2016-10-26  6:26 ` [Qemu-devel] [PATCH v2 1/6] target-ppc: add xscmp[eq, gt, ge, ne]dp instructions Nikunj A Dadhania
2016-10-27  3:34   ` David Gibson
2016-10-26  6:26 ` [Qemu-devel] [PATCH v2 2/6] bitops: fix rol/ror when shift is zero Nikunj A Dadhania
2016-10-26 15:20   ` Richard Henderson
2016-10-27  3:51     ` David Gibson
2016-10-30  2:57       ` Nikunj A Dadhania
2016-10-26  6:26 ` [Qemu-devel] [PATCH v2 3/6] target-ppc: add vrldnmi and vrlwmi instructions Nikunj A Dadhania
2016-10-27  3:38   ` David Gibson
2016-10-27  8:33     ` Nikunj A Dadhania
2016-10-28  1:30       ` David Gibson
2016-10-28 16:28         ` Richard Henderson
2016-10-26  6:26 ` [Qemu-devel] [PATCH v2 4/6] target-ppc: add vrldnm and vrlwnm instructions Nikunj A Dadhania
2016-10-27  3:39   ` David Gibson
2016-10-26  6:26 ` [Qemu-devel] [PATCH v2 5/6] target-ppc: add vprtyb[w/d/q] instructions Nikunj A Dadhania
2016-10-27  3:47   ` David Gibson
2016-10-27  5:22     ` Richard Henderson
2016-10-27  8:36       ` Nikunj A Dadhania
2016-10-27 14:16         ` Richard Henderson
2016-10-28  1:34           ` David Gibson [this message]
2016-10-27 13:28       ` David Gibson
2016-10-26  6:26 ` [Qemu-devel] [PATCH v2 6/6] target-ppc: Add xvcmpnesp, xvcmpnedp instructions Nikunj A Dadhania
2016-10-27  3:50   ` David Gibson

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