From: Julian Brown <julian@codesourcery.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH 4/5] ARM BE32 watchpoint fix.
Date: Thu, 3 Nov 2016 23:20:39 +0000 [thread overview]
Message-ID: <20161103232039.42e2ea11@squid.athome> (raw)
In-Reply-To: <CAFEAcA9Qj04PR191iaJj0x1YpyJUVtVbVzko0GD3PsNGj6_FVQ@mail.gmail.com>
On Thu, 3 Nov 2016 23:14:05 +0000
Peter Maydell <peter.maydell@linaro.org> wrote:
> On 3 November 2016 at 17:30, Julian Brown <julian@codesourcery.com>
> wrote:
> > In BE32 mode, sub-word size watchpoints can fail to trigger because
> > the address of the access is adjusted in the opcode helpers before
> > being compared with the watchpoint registers. This patch reversed
> > the address adjustment before performing the comparison.
> >
> > Signed-off-by: Julian Brown <julian@codesourcery.com>
> > ---
> > exec.c | 13 +++++++++++++
> > 1 file changed, 13 insertions(+)
> >
> > diff --git a/exec.c b/exec.c
> > index 4c84389..eadab54 100644
> > --- a/exec.c
> > +++ b/exec.c
> > @@ -2047,6 +2047,19 @@ static void check_watchpoint(int offset, int
> > len, MemTxAttrs attrs, int flags) return;
> > }
> > vaddr = (cpu->mem_io_vaddr & TARGET_PAGE_MASK) + offset;
> > +#if defined(TARGET_ARM) && !defined(CONFIG_USER_ONLY)
> > + /* In BE32 system mode, target memory is stored byteswapped
> > (FIXME:
> > + relative to a little-endian host system), and by the time
> > we reach here
> > + (via an opcode helper) the addresses of subword accesses
> > have been
> > + adjusted to account for that, which means that watchpoints
> > will not
> > + match. Undo the adjustment here. */
> > + if (arm_sctlr_b(env)) {
> > + if (len == 1)
> > + vaddr ^= 3;
> > + else if (len == 2)
> > + vaddr ^= 2;
> > + }
> > +#endif
>
> No target-CPU specific code in exec.c, please...
Yeah, I'd imagine not. I struggled with this one. Any suggestions for a
better way to do this?
Thanks,
Julian
next prev parent reply other threads:[~2016-11-03 23:20 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-03 17:30 [Qemu-devel] [PATCH 0/5] ARM BE8/BE32 big-endian system-mode fixes (semihosting, gdbstub) Julian Brown
2016-11-03 17:30 ` [Qemu-devel] [PATCH 1/5] ARM BE8/BE32 semihosting and gdbstub support Julian Brown
2016-11-03 22:23 ` Peter Maydell
2016-11-03 23:34 ` Julian Brown
2016-11-04 8:48 ` Paolo Bonzini
2016-11-04 10:25 ` Julian Brown
2016-11-04 11:01 ` Paolo Bonzini
2016-11-04 9:03 ` Paolo Bonzini
2016-12-06 15:11 ` Julian Brown
2016-12-06 15:44 ` Peter Maydell
2016-12-06 15:51 ` Julian Brown
2016-12-06 16:14 ` Peter Maydell
2016-11-03 17:30 ` [Qemu-devel] [PATCH 2/5] Fix Thumb-1 BE32 execution and disassembly Julian Brown
2016-11-04 13:30 ` Peter Maydell
2016-11-04 14:04 ` Julian Brown
2016-12-06 15:12 ` Julian Brown
2016-11-03 17:30 ` [Qemu-devel] [PATCH 3/5] Fix arm_semi_flen_cb for BE32 system mode Julian Brown
2016-11-04 9:00 ` Paolo Bonzini
2016-12-06 15:11 ` Julian Brown
2016-11-03 17:30 ` [Qemu-devel] [PATCH 4/5] ARM BE32 watchpoint fix Julian Brown
2016-11-03 23:14 ` Peter Maydell
2016-11-03 23:20 ` Julian Brown [this message]
2016-11-04 8:55 ` Paolo Bonzini
2016-12-06 15:12 ` Julian Brown
2016-11-03 21:26 ` [Qemu-devel] [PATCH 5/5] Fix typo in arm_cpu_do_interrupt_aarch32 Julian Brown
2016-11-04 13:02 ` Peter Maydell
2016-11-03 21:29 ` [Qemu-devel] [PATCH 0/5] ARM BE8/BE32 big-endian system-mode fixes (semihosting, gdbstub) no-reply
2016-11-03 21:37 ` no-reply
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