From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41304) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1c4UKO-0000m1-Ob for qemu-devel@nongnu.org; Wed, 09 Nov 2016 09:58:17 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1c4UKL-0002MD-0k for qemu-devel@nongnu.org; Wed, 09 Nov 2016 09:58:16 -0500 Received: from mail-wm0-x236.google.com ([2a00:1450:400c:c09::236]:35349) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1c4UKK-0002Ld-RW for qemu-devel@nongnu.org; Wed, 09 Nov 2016 09:58:12 -0500 Received: by mail-wm0-x236.google.com with SMTP id a197so312254314wmd.0 for ; Wed, 09 Nov 2016 06:58:12 -0800 (PST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= Date: Wed, 9 Nov 2016 14:57:44 +0000 Message-Id: <20161109145748.27282-16-alex.bennee@linaro.org> In-Reply-To: <20161109145748.27282-1-alex.bennee@linaro.org> References: <20161109145748.27282-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PATCH v6 15/19] target-arm/cpu: don't reset TLB structures, use cputlb to do it List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: pbonzini@redhat.com Cc: qemu-devel@nongnu.org, mttcg@listserver.greensocs.com, fred.konrad@greensocs.com, a.rigo@virtualopensystems.com, cota@braap.org, bobby.prani@gmail.com, nikunj@linux.vnet.ibm.com, mark.burton@greensocs.com, jan.kiszka@siemens.com, serge.fdrv@gmail.com, rth@twiddle.net, peter.maydell@linaro.org, claudio.fontana@huawei.com, =?UTF-8?q?Alex=20Benn=C3=A9e?= , "open list:ARM" cputlb owns the TLB entries and knows how to safely update them in MTTCG. Signed-off-by: Alex Bennée --- target-arm/cpu.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/target-arm/cpu.c b/target-arm/cpu.c index 99f0dbe..990bcb1 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -122,7 +122,13 @@ static void arm_cpu_reset(CPUState *s) acc->parent_reset(s); +#ifdef CONFIG_SOFTMMU + memset(env, 0, offsetof(CPUARMState, tlb_table)); + tlb_flush(s, 0); +#else memset(env, 0, offsetof(CPUARMState, features)); +#endif + g_hash_table_foreach(cpu->cp_regs, cp_reg_reset, cpu); g_hash_table_foreach(cpu->cp_regs, cp_reg_check_reset, cpu); -- 2.10.1