From: "Alex Bennée" <alex.bennee@linaro.org>
To: pbonzini@redhat.com
Cc: qemu-devel@nongnu.org, mttcg@listserver.greensocs.com,
fred.konrad@greensocs.com, a.rigo@virtualopensystems.com,
cota@braap.org, bobby.prani@gmail.com, nikunj@linux.vnet.ibm.com,
mark.burton@greensocs.com, jan.kiszka@siemens.com,
serge.fdrv@gmail.com, rth@twiddle.net, peter.maydell@linaro.org,
claudio.fontana@huawei.com,
"Alex Bennée" <alex.bennee@linaro.org>,
"Peter Crosthwaite" <crosthwaite.peter@gmail.com>
Subject: [Qemu-devel] [PATCH v6 02/19] tcg: add options for enabling MTTCG
Date: Wed, 9 Nov 2016 14:57:31 +0000 [thread overview]
Message-ID: <20161109145748.27282-3-alex.bennee@linaro.org> (raw)
In-Reply-To: <20161109145748.27282-1-alex.bennee@linaro.org>
From: KONRAD Frederic <fred.konrad@greensocs.com>
We know there will be cases where MTTCG won't work until additional work
is done in the front/back ends to support. It will however be useful to
be able to turn it on.
As a result MTTCG will default to off unless the combination is
supported. However the user can turn it on for the sake of testing.
Signed-off-by: KONRAD Frederic <fred.konrad@greensocs.com>
[AJB: move to -accel tcg,thread=multi|single, defaults]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
---
v1:
- merge with add mttcg option.
- update commit message
v2:
- machine_init->opts_init
v3:
- moved from -tcg to -accel tcg,thread=single|multi
- fix checkpatch warnings
v4:
- make mttcg_enabled extern, qemu_tcg_mttcg_enabled() now just macro
- qemu_tcg_configure now propagates Error instead of exiting
- better error checking of thread=foo
- use CONFIG flags for default_mttcg_enabled()
- disable mttcg with icount, error if both forced on
---
cpus.c | 43 +++++++++++++++++++++++++++++++++++++++++++
include/qom/cpu.h | 9 +++++++++
include/sysemu/cpus.h | 2 ++
qemu-options.hx | 20 ++++++++++++++++++++
vl.c | 49 ++++++++++++++++++++++++++++++++++++++++++++++++-
5 files changed, 122 insertions(+), 1 deletion(-)
diff --git a/cpus.c b/cpus.c
index 5213351..73ff851 100644
--- a/cpus.c
+++ b/cpus.c
@@ -25,6 +25,7 @@
/* Needed early for CONFIG_BSD etc. */
#include "qemu/osdep.h"
#include "qemu-common.h"
+#include "qemu/config-file.h"
#include "cpu.h"
#include "monitor/monitor.h"
#include "qapi/qmp/qerror.h"
@@ -148,6 +149,48 @@ typedef struct TimersState {
} TimersState;
static TimersState timers_state;
+bool mttcg_enabled;
+
+/*
+ * We default to false if we know other options have been enabled
+ * which are currently incompatible with MTTCG. Otherwise when each
+ * guest (target) and host has been updated to support:
+ * - atomic instructions
+ * - memory ordering
+ * they can set the appropriate CONFIG flags in ${target}-softmmu.mak
+ * and generated config-host.mak fragments.
+ */
+static bool default_mttcg_enabled(void)
+{
+ QemuOpts *icount_opts = qemu_find_opts_singleton("icount");
+ const char *rr = qemu_opt_get(icount_opts, "rr");
+
+ if (rr) {
+ return false;
+ } else {
+#if defined(CONFIG_MTTCG_TARGET) && defined(CONFIG_MTTCG_HOST)
+ return true;
+#else
+ return false;
+#endif
+ }
+}
+
+void qemu_tcg_configure(QemuOpts *opts, Error **errp)
+{
+ const char *t = qemu_opt_get(opts, "thread");
+ if (t) {
+ if (strcmp(t, "multi") == 0) {
+ mttcg_enabled = true;
+ } else if (strcmp(t, "single") == 0) {
+ mttcg_enabled = false;
+ } else {
+ error_setg(errp, "Invalid 'thread' setting %s", t);
+ }
+ } else {
+ mttcg_enabled = default_mttcg_enabled();
+ }
+}
int64_t cpu_get_icount_raw(void)
{
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index 3f79a8e..541785a 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -407,6 +407,15 @@ extern struct CPUTailQ cpus;
extern __thread CPUState *current_cpu;
/**
+ * qemu_tcg_mttcg_enabled:
+ * Check whether we are running MultiThread TCG or not.
+ *
+ * Returns: %true if we are in MTTCG mode %false otherwise.
+ */
+extern bool mttcg_enabled;
+#define qemu_tcg_mttcg_enabled() (mttcg_enabled)
+
+/**
* cpu_paging_enabled:
* @cpu: The CPU whose state is to be inspected.
*
diff --git a/include/sysemu/cpus.h b/include/sysemu/cpus.h
index 3728a1e..a73b5d4 100644
--- a/include/sysemu/cpus.h
+++ b/include/sysemu/cpus.h
@@ -36,4 +36,6 @@ extern int smp_threads;
void list_cpus(FILE *f, fprintf_function cpu_fprintf, const char *optarg);
+void qemu_tcg_configure(QemuOpts *opts, Error **errp);
+
#endif
diff --git a/qemu-options.hx b/qemu-options.hx
index 4536e18..7857a5a 100644
--- a/qemu-options.hx
+++ b/qemu-options.hx
@@ -96,6 +96,26 @@ STEXI
Select CPU model (@code{-cpu help} for list and additional feature selection)
ETEXI
+DEF("accel", HAS_ARG, QEMU_OPTION_accel,
+ "-accel [accel=]accelerator[,thread=single|multi]\n"
+ " select accelerator ('-accel help for list')\n"
+ " thread=single|multi (enable multi-threaded TCG)", QEMU_ARCH_ALL)
+STEXI
+@item -accel @var{name}[,prop=@var{value}[,...]]
+@findex -accel
+This is used to enable an accelerator. Depending on the target architecture,
+kvm, xen, or tcg can be available. By default, tcg is used. If there is more
+than one accelerator specified, the next one is used if the previous one fails
+to initialize.
+@table @option
+@item thread=single|multi
+Controls number of TCG threads. When the TCG is multi-threaded there will be one
+thread per vCPU therefor taking advantage of additional host cores. The default
+is to enable multi-threading where both the back-end and front-ends support it and
+no incompatible TCG features have been enabled (e.g. icount/replay).
+@end table
+ETEXI
+
DEF("smp", HAS_ARG, QEMU_OPTION_smp,
"-smp [cpus=]n[,maxcpus=cpus][,cores=cores][,threads=threads][,sockets=sockets]\n"
" set the number of CPUs to 'n' [default=1]\n"
diff --git a/vl.c b/vl.c
index 319f641..a285a58 100644
--- a/vl.c
+++ b/vl.c
@@ -296,6 +296,26 @@ static QemuOptsList qemu_machine_opts = {
},
};
+static QemuOptsList qemu_accel_opts = {
+ .name = "accel",
+ .implied_opt_name = "accel",
+ .head = QTAILQ_HEAD_INITIALIZER(qemu_accel_opts.head),
+ .merge_lists = true,
+ .desc = {
+ {
+ .name = "accel",
+ .type = QEMU_OPT_STRING,
+ .help = "Select the type of accelerator",
+ },
+ {
+ .name = "thread",
+ .type = QEMU_OPT_STRING,
+ .help = "Enable/disable multi-threaded TCG",
+ },
+ { /* end of list */ }
+ },
+};
+
static QemuOptsList qemu_boot_opts = {
.name = "boot-opts",
.implied_opt_name = "order",
@@ -3004,7 +3024,8 @@ int main(int argc, char **argv, char **envp)
const char *boot_once = NULL;
DisplayState *ds;
int cyls, heads, secs, translation;
- QemuOpts *hda_opts = NULL, *opts, *machine_opts, *icount_opts = NULL;
+ QemuOpts *opts, *machine_opts;
+ QemuOpts *hda_opts = NULL, *icount_opts = NULL, *accel_opts = NULL;
QemuOptsList *olist;
int optind;
const char *optarg;
@@ -3059,6 +3080,7 @@ int main(int argc, char **argv, char **envp)
qemu_add_opts(&qemu_trace_opts);
qemu_add_opts(&qemu_option_rom_opts);
qemu_add_opts(&qemu_machine_opts);
+ qemu_add_opts(&qemu_accel_opts);
qemu_add_opts(&qemu_mem_opts);
qemu_add_opts(&qemu_smp_opts);
qemu_add_opts(&qemu_boot_opts);
@@ -3752,6 +3774,26 @@ int main(int argc, char **argv, char **envp)
qdev_prop_register_global(&kvm_pit_lost_tick_policy);
break;
}
+ case QEMU_OPTION_accel:
+ accel_opts = qemu_opts_parse_noisily(qemu_find_opts("accel"),
+ optarg, true);
+ optarg = qemu_opt_get(accel_opts, "accel");
+
+ olist = qemu_find_opts("machine");
+ if (strcmp("kvm", optarg) == 0) {
+ qemu_opts_parse_noisily(olist, "accel=kvm", false);
+ } else if (strcmp("xen", optarg) == 0) {
+ qemu_opts_parse_noisily(olist, "accel=xen", false);
+ } else if (strcmp("tcg", optarg) == 0) {
+ qemu_opts_parse_noisily(olist, "accel=tcg", false);
+ } else {
+ if (!is_help_option(optarg)) {
+ error_printf("Unknown accelerator: %s", optarg);
+ }
+ error_printf("Supported accelerators: kvm, xen, tcg\n");
+ exit(1);
+ }
+ break;
case QEMU_OPTION_usb:
olist = qemu_find_opts("machine");
qemu_opts_parse_noisily(olist, "usb=on", false);
@@ -4057,6 +4099,8 @@ int main(int argc, char **argv, char **envp)
replay_configure(icount_opts);
+ qemu_tcg_configure(accel_opts, &error_fatal);
+
machine_class = select_machine();
set_memory_options(&ram_slots, &maxram_size, machine_class);
@@ -4421,6 +4465,9 @@ int main(int argc, char **argv, char **envp)
if (kvm_enabled() || xen_enabled()) {
error_report("-icount is not allowed with kvm or xen");
exit(1);
+ } else if (qemu_tcg_mttcg_enabled()) {
+ error_report("-icount does not currently work with MTTCG");
+ exit(1);
}
configure_icount(icount_opts, &error_abort);
qemu_opts_del(icount_opts);
--
2.10.1
next prev parent reply other threads:[~2016-11-09 14:58 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-09 14:57 [Qemu-devel] [PATCH v6 00/19] Remaining MTTCG Base patches and ARM enablement Alex Bennée
2016-11-09 14:57 ` [Qemu-devel] [PATCH v6 01/19] docs: new design document multi-thread-tcg.txt Alex Bennée
2016-11-10 15:00 ` Richard Henderson
2016-11-09 14:57 ` Alex Bennée [this message]
2016-11-09 14:57 ` [Qemu-devel] [PATCH v6 03/19] tcg: add kick timer for single-threaded vCPU emulation Alex Bennée
2016-11-10 15:10 ` Richard Henderson
2016-11-09 14:57 ` [Qemu-devel] [PATCH v6 04/19] tcg: rename tcg_current_cpu to tcg_current_rr_cpu Alex Bennée
2016-11-09 14:57 ` [Qemu-devel] [PATCH v6 05/19] tcg: drop global lock during TCG code execution Alex Bennée
2016-11-10 15:18 ` Richard Henderson
2016-11-09 14:57 ` [Qemu-devel] [PATCH v6 06/19] tcg: remove global exit_request Alex Bennée
2016-11-09 14:57 ` [Qemu-devel] [PATCH v6 07/19] tcg: enable tb_lock() for SoftMMU Alex Bennée
2016-11-09 14:57 ` [Qemu-devel] [PATCH v6 08/19] tcg: enable thread-per-vCPU Alex Bennée
2016-11-10 16:35 ` Richard Henderson
2016-11-10 16:46 ` Alex Bennée
2016-11-09 14:57 ` [Qemu-devel] [PATCH v6 09/19] tcg: handle EXCP_ATOMIC exception for system emulation Alex Bennée
2016-11-10 16:36 ` Richard Henderson
2016-11-09 14:57 ` [Qemu-devel] [PATCH v6 10/19] cputlb: add assert_cpu_is_self checks Alex Bennée
2016-11-10 16:39 ` Richard Henderson
2016-11-09 14:57 ` [Qemu-devel] [PATCH v6 11/19] cputlb: introduce tlb_flush_* async work Alex Bennée
2016-11-10 16:48 ` Richard Henderson
2016-11-10 17:34 ` Alex Bennée
2016-11-10 17:40 ` Richard Henderson
2016-11-09 14:57 ` [Qemu-devel] [PATCH v6 12/19] cputlb: tweak qemu_ram_addr_from_host_nofail reporting Alex Bennée
2016-11-10 16:51 ` Richard Henderson
2016-11-09 14:57 ` [Qemu-devel] [PATCH v6 13/19] cputlb: atomically update tlb fields used by tlb_reset_dirty Alex Bennée
2016-11-09 19:36 ` Pranith Kumar
2016-11-10 16:14 ` Alex Bennée
2016-11-10 17:27 ` Richard Henderson
2016-11-10 18:00 ` Alex Bennée
2016-11-10 18:32 ` Richard Henderson
2016-11-10 17:23 ` Richard Henderson
2016-11-10 18:07 ` Alex Bennée
2016-11-09 14:57 ` [Qemu-devel] [PATCH v6 14/19] target-arm/powerctl: defer cpu reset work to CPU context Alex Bennée
2016-11-10 17:35 ` Richard Henderson
2016-11-09 14:57 ` [Qemu-devel] [PATCH v6 15/19] target-arm/cpu: don't reset TLB structures, use cputlb to do it Alex Bennée
2016-11-10 17:48 ` Richard Henderson
2016-11-10 18:08 ` Alex Bennée
2016-11-09 14:57 ` [Qemu-devel] [PATCH v6 16/19] target-arm: ensure BQL taken for ARM_CP_IO register access Alex Bennée
2016-11-10 17:54 ` Richard Henderson
2016-11-09 14:57 ` [Qemu-devel] [PATCH v6 17/19] target-arm: helpers which may affect global state need the BQL Alex Bennée
2016-11-10 17:56 ` Richard Henderson
2016-11-09 14:57 ` [Qemu-devel] [PATCH v6 18/19] target-arm: don't generate WFE/YIELD calls for MTTCG Alex Bennée
2016-11-10 17:59 ` Richard Henderson
2016-11-09 14:57 ` [Qemu-devel] [PATCH v6 19/19] tcg: enable MTTCG by default for ARM on x86 hosts Alex Bennée
2016-11-10 18:00 ` Richard Henderson
2016-11-10 18:13 ` Alex Bennée
2016-11-10 18:41 ` Richard Henderson
2016-11-09 15:11 ` [Qemu-devel] [PATCH v6 00/19] Remaining MTTCG Base patches and ARM enablement Paolo Bonzini
2016-11-09 18:38 ` Alex Bennée
2016-11-13 5:50 ` no-reply
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