From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42111) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1c9Ouf-00068g-Uc for qemu-devel@nongnu.org; Tue, 22 Nov 2016 23:12:03 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1c9Oue-0000Xk-58 for qemu-devel@nongnu.org; Tue, 22 Nov 2016 23:12:01 -0500 Date: Wed, 23 Nov 2016 15:11:09 +1100 From: David Gibson Message-ID: <20161123041109.GC17795@umbus.fritz.box> References: <1479815165-31059-1-git-send-email-nikunj@linux.vnet.ibm.com> <1479815165-31059-9-git-send-email-nikunj@linux.vnet.ibm.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="UFHRwCdBEJvubb2X" Content-Disposition: inline In-Reply-To: <1479815165-31059-9-git-send-email-nikunj@linux.vnet.ibm.com> Subject: Re: [Qemu-devel] [PATCH 8/9] target-ppc: add vextu[bhw]lx instructions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Nikunj A Dadhania Cc: qemu-ppc@nongnu.org, rth@twiddle.net, qemu-devel@nongnu.org, bharata@linux.vnet.ibm.com, Avinesh Kumar --UFHRwCdBEJvubb2X Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Nov 22, 2016 at 05:16:04PM +0530, Nikunj A Dadhania wrote: > From: Avinesh Kumar >=20 > vextublx: Vector Extract Unsigned Byte Left > vextuhlx: Vector Extract Unsigned Halfword Left > vextuwlx: Vector Extract Unsigned Word Left >=20 > Signed-off-by: Avinesh Kumar > Signed-off-by: Nikunj A Dadhania > --- > target-ppc/helper.h | 3 ++ > target-ppc/int_helper.c | 63 +++++++++++++++++++++++++++++++= ++++++ > target-ppc/translate/vmx-impl.inc.c | 18 +++++++++++ > target-ppc/translate/vmx-ops.inc.c | 4 ++- > 4 files changed, 87 insertions(+), 1 deletion(-) >=20 > diff --git a/target-ppc/helper.h b/target-ppc/helper.h > index 3b26678..d0a8fb2 100644 > --- a/target-ppc/helper.h > +++ b/target-ppc/helper.h > @@ -366,6 +366,9 @@ DEF_HELPER_3(vpmsumb, void, avr, avr, avr) > DEF_HELPER_3(vpmsumh, void, avr, avr, avr) > DEF_HELPER_3(vpmsumw, void, avr, avr, avr) > DEF_HELPER_3(vpmsumd, void, avr, avr, avr) > +DEF_HELPER_2(vextublx, tl, tl, avr) > +DEF_HELPER_2(vextuhlx, tl, tl, avr) > +DEF_HELPER_2(vextuwlx, tl, tl, avr) > =20 > DEF_HELPER_2(vsbox, void, avr, avr) > DEF_HELPER_3(vcipher, void, avr, avr, avr) > diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c > index 8886a72..fb9f178 100644 > --- a/target-ppc/int_helper.c > +++ b/target-ppc/int_helper.c > @@ -1805,6 +1805,69 @@ void helper_vlogefp(CPUPPCState *env, ppc_avr_t *r= , ppc_avr_t *b) > } > } > =20 > +#define EXTRACT128(value, start, length) \ > + ((value >> start) & (~(__uint128_t)0 >> (128 - length))) Although we do use 128-bit arithmetic in some places in qemu, I don't think we assume the presence of a working uint1238_t type. Better to actually write a helper function which does this in terms of 64 bit arithmetic, I think. > + > +#if defined(HOST_WORDS_BIGENDIAN) > +# if defined(CONFIG_INT128) > +# define VEXTULX_DO(name, elem) \ > +target_ulong glue(helper_, name)(target_ulong a, ppc_avr_t *b) \ It seems a bit odd to need helpers for what's essentially just copying a byte/halfword/whatever out of the vector. > +{ \ > + target_ulong r =3D 0; \ > + int index =3D (a & 0xf) * 8; \ > + r =3D EXTRACT128(b->u128, index, elem * 8); \ > + return r; \ > +} > +# else > +# define VEXTULX_DO(name, elem) \ > +target_ulong glue(helper_, name)(target_ulong a, ppc_avr_t *b) \ > +{ \ > + target_ulong r =3D 0; \ > + int i; \ > + int index =3D a & 0xf; \ > + for (i =3D 0; i < elem; i++) { \ > + r =3D r << 8; \ > + if (index + i <=3D 15) { \ > + r =3D r | b->u8[index + i]; \ > + } \ > + } \ > + return r; \ > +} > +# endif > +#else > +# if defined(CONFIG_INT128) > +# define VEXTULX_DO(name, elem) \ > +target_ulong glue(helper_, name)(target_ulong a, ppc_avr_t *b) \ > +{ \ > + target_ulong r =3D 0; \ > + int size =3D elem * 8; \ > + int index =3D (15 - (a & 0xf) + 1) * 8; \ > + r =3D EXTRACT128(b->u128, (index - size), size); \ > + return r; \ > +} > +# else > +# define VEXTULX_DO(name, elem) \ > +target_ulong glue(helper_, name)(target_ulong a, ppc_avr_t *b) \ > +{ \ > + target_ulong r =3D 0; \ > + int i; \ > + int index =3D 15 - (a & 0xf); \ > + for (i =3D 0; i < elem; i++) { \ > + r =3D r << 8; \ > + if (index - i >=3D 0) { \ > + r =3D r | b->u8[index - i]; \ > + } \ > + } \ > + return r; \ > +} > +# endif > +#endif > + > +VEXTULX_DO(vextublx, 1) > +VEXTULX_DO(vextuhlx, 2) > +VEXTULX_DO(vextuwlx, 4) > +#undef VEXTULX_DO > + > /* The specification says that the results are undefined if all of the > * shift counts are not identical. We check to make sure that they are > * to conform to what real hardware appears to do. */ > diff --git a/target-ppc/translate/vmx-impl.inc.c b/target-ppc/translate/v= mx-impl.inc.c > index 7143eb3..e91d10b 100644 > --- a/target-ppc/translate/vmx-impl.inc.c > +++ b/target-ppc/translate/vmx-impl.inc.c > @@ -340,6 +340,19 @@ static void glue(gen_, name0##_##name1)(DisasContext= *ctx) \ > } \ > } > =20 > +#define GEN_VXFORM_HETRO(name, opc2, opc3) \ > +static void glue(gen_, name)(DisasContext *ctx) \ > +{ \ > + TCGv_ptr rb; \ > + if (unlikely(!ctx->altivec_enabled)) { \ > + gen_exception(ctx, POWERPC_EXCP_VPU); \ > + return; \ > + } \ > + rb =3D gen_avr_ptr(rB(ctx->opcode)); = \ > + gen_helper_##name(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]= , rb); \ > + tcg_temp_free_ptr(rb); \ > +} > + > GEN_VXFORM(vaddubm, 0, 0); > GEN_VXFORM_DUAL_EXT(vaddubm, PPC_ALTIVEC, PPC_NONE, 0, \ > vmul10cuq, PPC_NONE, PPC2_ISA300, 0x0000F800) > @@ -525,6 +538,11 @@ GEN_VXFORM_ENV(vaddfp, 5, 0); > GEN_VXFORM_ENV(vsubfp, 5, 1); > GEN_VXFORM_ENV(vmaxfp, 5, 16); > GEN_VXFORM_ENV(vminfp, 5, 17); > +GEN_VXFORM_HETRO(vextublx, 6, 24) > +GEN_VXFORM_HETRO(vextuhlx, 6, 25) > +GEN_VXFORM_HETRO(vextuwlx, 6, 26) > +GEN_VXFORM_DUAL(vmrgow, PPC_NONE, PPC2_ALTIVEC_207, > + vextuwlx, PPC_NONE, PPC2_ISA300) > =20 > #define GEN_VXRFORM1(opname, name, str, opc2, opc3) \ > static void glue(gen_, name)(DisasContext *ctx) \ > diff --git a/target-ppc/translate/vmx-ops.inc.c b/target-ppc/translate/vm= x-ops.inc.c > index f02b3be..e62e564 100644 > --- a/target-ppc/translate/vmx-ops.inc.c > +++ b/target-ppc/translate/vmx-ops.inc.c > @@ -91,8 +91,10 @@ GEN_VXFORM(vmrghw, 6, 2), > GEN_VXFORM(vmrglb, 6, 4), > GEN_VXFORM(vmrglh, 6, 5), > GEN_VXFORM(vmrglw, 6, 6), > +GEN_VXFORM_300(vextublx, 6, 24), > +GEN_VXFORM_300(vextuhlx, 6, 25), > +GEN_VXFORM_DUAL(vmrgow, vextuwlx, 6, 26, PPC_NONE, PPC2_ALTIVEC_207), > GEN_VXFORM_207(vmrgew, 6, 30), > -GEN_VXFORM_207(vmrgow, 6, 26), > GEN_VXFORM(vmuloub, 4, 0), > GEN_VXFORM(vmulouh, 4, 1), > GEN_VXFORM_DUAL(vmulouw, vmuluwm, 4, 2, PPC_ALTIVEC, PPC_NONE), --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson --UFHRwCdBEJvubb2X Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAEBCAAGBQJYNRbdAAoJEGw4ysog2bOSM7MP/2NRlKtCPwBkVyJ4bxbwvYX9 sUd5qn9/OCUK4t6js4WkJHK9A0kfluKBqRoS3rRhfsttTKfMV4Te6kadBWpYXPh9 o1essszOo0Q+rHiWt4C5Np1H+9Ux+mlZ9YYzinV49PSpPOjPJND+9PRUFI9vtHc+ SfnPO+n51C+VeKSC54pNkpfSomEk16LoFdsLz8kiVVR7sswlnLLd4mDMqGsi++AP 6TcKCCRv38yONCfed4Kz+u/skySLj27eOJEk5HAEyY69M4PfwG60oZnzmfJCdQ3/ OuTvEDjgep2osvteB+XBUoFy0HWBtQFxt+nzaEyszvhHA7fXwTdN/F6h5nkooC0T i9/aU2DlOM9N5gTtC/c15SyT7ee3N9NU3Zq5InZKIIOe3kyJoh77h1i6P9SDHAVO FddQ+UQjcwnsLN21uhm4/SxgFYlJFysBqTm6pPpR08yoqMr4FKe7cI9/tsY01iba J20WpU4eyjQDIj0X3A4P+tnJBSinL4sX/r+OGARgQyf16yT8bagiEXcKJFpR/hQk XTZOwK3PuLRhVsdkTwIb56f2gpJa0md+fYYd4Cu8YMLF6s7IYkUACGmL9jJhTMUq C/gl2mdOD6PshwXQ12zOtSdDv/c9TCO4vJNcQGYUw9qE+8ENSsNtDn3Y6GwEWh5a l3axfwz2Zr4gOW4q997s =GXB7 -----END PGP SIGNATURE----- --UFHRwCdBEJvubb2X--