From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:32937) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1c9aoO-0001RX-P6 for qemu-devel@nongnu.org; Wed, 23 Nov 2016 11:54:21 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1c9aoN-0000Jl-Rr for qemu-devel@nongnu.org; Wed, 23 Nov 2016 11:54:20 -0500 From: Andrew Jones Date: Wed, 23 Nov 2016 17:53:57 +0100 Message-Id: <20161123165406.32661-3-drjones@redhat.com> In-Reply-To: <20161123165406.32661-1-drjones@redhat.com> References: <20161123165406.32661-1-drjones@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [kvm-unit-tests PATCH v7 02/11] arm64: fix get_"sysreg32" and make MPIDR 64bit List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, qemu-devel@nongnu.org, qemu-arm@nongnu.org Cc: peter.maydell@linaro.org, marc.zyngier@arm.com, andre.przywara@arm.com, eric.auger@redhat.com, pbonzini@redhat.com, alex.bennee@linaro.org, christoffer.dall@linaro.org mrs is always 64bit, so we should always use a 64bit register. Sometimes we'll only want to return the lower 32, but not for MPIDR, as that does define fields in the upper 32. Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Eric Auger Signed-off-by: Andrew Jones --- v5: switch arm32's get_mpidr to 'unsigned long' too, to be consistent with arm64 [Andre] --- lib/arm/asm/processor.h | 4 ++-- lib/arm64/asm/processor.h | 15 +++++++++------ 2 files changed, 11 insertions(+), 8 deletions(-) diff --git a/lib/arm/asm/processor.h b/lib/arm/asm/processor.h index f25e7eee3666..02f912f99974 100644 --- a/lib/arm/asm/processor.h +++ b/lib/arm/asm/processor.h @@ -33,9 +33,9 @@ static inline unsigned long current_cpsr(void) =20 #define current_mode() (current_cpsr() & MODE_MASK) =20 -static inline unsigned int get_mpidr(void) +static inline unsigned long get_mpidr(void) { - unsigned int mpidr; + unsigned long mpidr; asm volatile("mrc p15, 0, %0, c0, c0, 5" : "=3Dr" (mpidr)); return mpidr; } diff --git a/lib/arm64/asm/processor.h b/lib/arm64/asm/processor.h index 84d5c7ce752b..9a208ff729b7 100644 --- a/lib/arm64/asm/processor.h +++ b/lib/arm64/asm/processor.h @@ -66,14 +66,17 @@ static inline unsigned long current_level(void) return el & 0xc; } =20 -#define DEFINE_GET_SYSREG32(reg) \ -static inline unsigned int get_##reg(void) \ +#define DEFINE_GET_SYSREG(reg, type) \ +static inline type get_##reg(void) \ { \ - unsigned int reg; \ - asm volatile("mrs %0, " #reg "_el1" : "=3Dr" (reg)); \ - return reg; \ + unsigned long r; \ + asm volatile("mrs %0, " #reg "_el1" : "=3Dr" (r)); \ + return (type)r; \ } -DEFINE_GET_SYSREG32(mpidr) +#define DEFINE_GET_SYSREG32(reg) DEFINE_GET_SYSREG(reg, unsigned int) +#define DEFINE_GET_SYSREG64(reg) DEFINE_GET_SYSREG(reg, unsigned long) + +DEFINE_GET_SYSREG64(mpidr) =20 /* Only support Aff0 for now, gicv2 only */ #define mpidr_to_cpu(mpidr) ((int)((mpidr) & 0xff)) --=20 2.9.3