From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60429) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1c9wcF-00085D-EI for qemu-devel@nongnu.org; Thu, 24 Nov 2016 11:11:19 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1c9wcD-0006Nj-MB for qemu-devel@nongnu.org; Thu, 24 Nov 2016 11:11:15 -0500 Received: from mail-wm0-x229.google.com ([2a00:1450:400c:c09::229]:38242) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1c9wcC-0006Iu-CW for qemu-devel@nongnu.org; Thu, 24 Nov 2016 11:11:13 -0500 Received: by mail-wm0-x229.google.com with SMTP id f82so66544452wmf.1 for ; Thu, 24 Nov 2016 08:11:11 -0800 (PST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= Date: Thu, 24 Nov 2016 16:10:29 +0000 Message-Id: <20161124161033.11456-8-alex.bennee@linaro.org> In-Reply-To: <20161124161033.11456-1-alex.bennee@linaro.org> References: <20161124161033.11456-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [kvm-unit-tests PATCH v7 07/11] arm/tlbflush-code: Add TLB flush during code execution test List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, christoffer.dall@linaro.org, marc.zyngier@arm.com Cc: qemu-devel@nongnu.org, mttcg@listserver.greensocs.com, fred.konrad@greensocs.com, a.rigo@virtualopensystems.com, cota@braap.org, bobby.prani@gmail.com, nikunj@linux.vnet.ibm.com, mark.burton@greensocs.com, pbonzini@redhat.com, jan.kiszka@siemens.com, serge.fdrv@gmail.com, rth@twiddle.net, peter.maydell@linaro.org, claudio.fontana@huawei.com, =?UTF-8?q?Alex=20Benn=C3=A9e?= , Mark Rutland This adds a fairly brain dead torture test for TLB flushes intended for stressing the MTTCG QEMU build. It takes the usual -smp option for multiple CPUs. By default it CPU0 will do a TLBIALL flush after each cycle. You can pass options via -append to control additional aspects of the test: - "page" flush each page in turn (one per function) - "self" do the flush after each computation cycle - "verbose" report progress on each computation cycle Signed-off-by: Alex Bennée CC: Mark Rutland --- v2 - rename to tlbflush-test - made makefile changes cleaner - added self/other flush mode - create specific prefix - whitespace fixes v3 - using new SMP framework for test runing v4 - merge in the unitests.cfg v5 - max out at -smp 4 - printf fmtfix v7 - rename to tlbflush-code - int -> bool flags --- arm/Makefile.common | 2 + arm/tlbflush-code.c | 212 ++++++++++++++++++++++++++++++++++++++++++++++++++++ arm/unittests.cfg | 24 ++++++ 3 files changed, 238 insertions(+) create mode 100644 arm/tlbflush-code.c diff --git a/arm/Makefile.common b/arm/Makefile.common index cca0d9c..de99a6e 100644 --- a/arm/Makefile.common +++ b/arm/Makefile.common @@ -13,6 +13,7 @@ tests-common = $(TEST_DIR)/selftest.flat tests-common += $(TEST_DIR)/spinlock-test.flat tests-common += $(TEST_DIR)/pci-test.flat tests-common += $(TEST_DIR)/gic.flat +tests-common += $(TEST_DIR)/tlbflush-code.flat all: test_cases @@ -81,3 +82,4 @@ generated_files = $(asm-offsets) test_cases: $(generated_files) $(tests-common) $(tests) $(TEST_DIR)/selftest.o $(cstart.o): $(asm-offsets) +$(TEST_DIR)/tlbflush-code.elf: $(cstart.o) $(TEST_DIR)/tlbflush-code.o diff --git a/arm/tlbflush-code.c b/arm/tlbflush-code.c new file mode 100644 index 0000000..cb5cdc2 --- /dev/null +++ b/arm/tlbflush-code.c @@ -0,0 +1,212 @@ +/* + * TLB Flush Race Tests + * + * These tests are designed to test for incorrect TLB flush semantics + * under emulation. The initial CPU will set all the others working a + * compuation task and will then trigger TLB flushes across the + * system. It doesn't actually need to re-map anything but the flushes + * themselves will trigger QEMU's TCG self-modifying code detection + * which will invalidate any generated code causing re-translation. + * Eventually the code buffer will fill and a general tb_lush() will + * be triggered. + * + * Copyright (C) 2016, Linaro, Alex Bennée + * + * This work is licensed under the terms of the GNU LGPL, version 2. + */ + +#include +#include +#include +#include +#include + +#define SEQ_LENGTH 10 +#define SEQ_HASH 0x7cd707fe + +static cpumask_t smp_test_complete; +static int flush_count = 1000000; +static bool flush_self; +static bool flush_page; +static bool flush_verbose; + +/* + * Work functions + * + * These work functions need to be: + * + * - page aligned, so we can flush one function at a time + * - have branches, so QEMU TCG generates multiple basic blocks + * - call across pages, so we exercise the TCG basic block slow path + */ + +/* Adler32 */ +__attribute__((aligned(PAGE_SIZE))) uint32_t hash_array(const void *buf, + size_t buflen) +{ + const uint8_t *data = (uint8_t *) buf; + uint32_t s1 = 1; + uint32_t s2 = 0; + + for (size_t n = 0; n < buflen; n++) { + s1 = (s1 + data[n]) % 65521; + s2 = (s2 + s1) % 65521; + } + return (s2 << 16) | s1; +} + +__attribute__((aligned(PAGE_SIZE))) void create_fib_sequence(int length, + unsigned int *array) +{ + int i; + + /* first two values */ + array[0] = 0; + array[1] = 1; + for (i=2; i4?4:$MAX_SMP)) +groups = tlbflush + +[tlbflush-code::page_other] +file = tlbflush-code.flat +smp = $(($MAX_SMP>4?4:$MAX_SMP)) +extra_params = -append 'page' +groups = tlbflush + +[tlbflush-code::all_self] +file = tlbflush-code.flat +smp = $(($MAX_SMP>4?4:$MAX_SMP)) +extra_params = -append 'self' +groups = tlbflush + +[tlbflush-code::page_self] +file = tlbflush-code.flat +smp = $(($MAX_SMP>4?4:$MAX_SMP)) +extra_params = -append 'page self' +groups = tlbflush -- 2.10.1