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From: David Gibson <david@gibson.dropbear.id.au>
To: Richard Henderson <rth@twiddle.net>
Cc: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>,
	qemu-ppc@nongnu.org, bharata@linux.vnet.ibm.com,
	qemu-devel@nongnu.org, nikunj@linux.vnet.ibm.com
Subject: Re: [Qemu-devel] [PATCH 2/7] target-ppc: Implement unsigned quadword left/right shift and unit tests
Date: Mon, 5 Dec 2016 12:56:39 +1100	[thread overview]
Message-ID: <20161205015639.GB12426@umbus.fritz.box> (raw)
In-Reply-To: <aadc15aa-9063-b549-ee5c-0c88159883a5@twiddle.net>

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On Sat, Dec 03, 2016 at 05:37:27PM -0800, Richard Henderson wrote:
> On 12/02/2016 09:00 PM, Jose Ricardo Ziviani wrote:
> > +++ b/include/qemu/host-utils.h
> > @@ -29,6 +29,33 @@
> >  #include "qemu/bswap.h"
> > 
> >  #ifdef CONFIG_INT128
> > +static inline void urshift(uint64_t *plow, uint64_t *phigh, uint32_t shift)
> > +{
> > +    __uint128_t val = ((__uint128_t)*phigh << 64) | *plow;
> > +    val >>= (shift & 127);
> > +    *phigh = val >> 64;
> > +    *plow = val & 0xffffffffffffffff;
> > +}
> > +
> > +static inline void ulshift(uint64_t *plow, uint64_t *phigh,
> > +                           uint32_t shift, bool *overflow)
> > +{
> > +    __uint128_t val = ((__uint128_t)*phigh << 64) | *plow;
> > +
> > +    if (shift == 0) {
> > +        return;
> > +    }
> > +
> > +    if (shift > 127 || (val >> (128 - (shift & 127))) != 0) {
> > +        *overflow = true;
> > +    }
> > +
> > +    val <<= (shift & 127);
> > +
> > +    *phigh = val >> 64;
> > +    *plow = val & 0xffffffffffffffff;
> > +}
> > +
> 
> This belongs in qemu/int128.h, not here.  And certainly not predicated on
> CONFIG_INT128.

Is there actually any advantage to the __uint128_t based versions over
the 64-bit versions?

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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  reply	other threads:[~2016-12-05  3:23 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-12-03  4:59 [Qemu-devel] [PATCH 0/7] POWER9 TCG enablements - BCD functions - final part Jose Ricardo Ziviani
2016-12-03  5:00 ` [Qemu-devel] [PATCH 1/7] target-ppc: Implement bcd_is_valid function Jose Ricardo Ziviani
2016-12-03  5:00 ` [Qemu-devel] [PATCH 2/7] target-ppc: Implement unsigned quadword left/right shift and unit tests Jose Ricardo Ziviani
2016-12-04  1:37   ` Richard Henderson
2016-12-05  1:56     ` David Gibson [this message]
2016-12-05  9:35       ` [Qemu-devel] [Qemu-ppc] " joserz
2016-12-05 22:59         ` David Gibson
2016-12-03  5:00 ` [Qemu-devel] [PATCH 3/7] target-ppc: Implement bcds. instruction Jose Ricardo Ziviani
2016-12-05  3:12   ` David Gibson
2016-12-05  3:15     ` David Gibson
2016-12-03  5:00 ` [Qemu-devel] [PATCH 4/7] target-ppc: Implement bcdus. instruction Jose Ricardo Ziviani
2016-12-05  3:14   ` David Gibson
2016-12-03  5:00 ` [Qemu-devel] [PATCH 5/7] target-ppc: Implement bcdsr. instruction Jose Ricardo Ziviani
2016-12-05  3:19   ` David Gibson
2016-12-05  9:45     ` [Qemu-devel] [Qemu-ppc] " joserz
2016-12-05 18:52     ` joserz
2016-12-05 23:01       ` David Gibson
2016-12-03  5:00 ` [Qemu-devel] [PATCH 6/7] target-ppc: Implement bcdtrunc. instruction Jose Ricardo Ziviani
2016-12-03  5:00 ` [Qemu-devel] [PATCH 7/7] " Jose Ricardo Ziviani

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