From: David Gibson <david@gibson.dropbear.id.au>
To: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Cc: qemu-ppc@nongnu.org, rth@twiddle.net, qemu-devel@nongnu.org,
bharata@linux.vnet.ibm.com
Subject: Re: [Qemu-devel] [PATCH v1 6/9] target-ppc: implement xxinsertw instruction
Date: Fri, 9 Dec 2016 09:34:19 +1100 [thread overview]
Message-ID: <20161208223419.GF13139@umbus.fritz.box> (raw)
In-Reply-To: <1481135102-20011-7-git-send-email-nikunj@linux.vnet.ibm.com>
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On Wed, Dec 07, 2016 at 11:54:59PM +0530, Nikunj A Dadhania wrote:
> xxinsertw: VSX Vector Insert Word
>
> Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
> Reviewed-by: Richard Henderson <rth@twiddle.net>
> ---
> target-ppc/helper.h | 1 +
> target-ppc/int_helper.c | 30 ++++++++++++++++++++++++++++++
> target-ppc/translate/vsx-impl.inc.c | 5 +++--
> target-ppc/translate/vsx-ops.inc.c | 1 +
> 4 files changed, 35 insertions(+), 2 deletions(-)
>
> diff --git a/target-ppc/helper.h b/target-ppc/helper.h
> index 940f81c..9f812c8 100644
> --- a/target-ppc/helper.h
> +++ b/target-ppc/helper.h
> @@ -537,6 +537,7 @@ DEF_HELPER_2(xvrspim, void, env, i32)
> DEF_HELPER_2(xvrspip, void, env, i32)
> DEF_HELPER_2(xvrspiz, void, env, i32)
> DEF_HELPER_4(xxextractuw, void, env, tl, tl, i32)
> +DEF_HELPER_4(xxinsertw, void, env, tl, tl, i32)
>
> DEF_HELPER_2(efscfsi, i32, env, i32)
> DEF_HELPER_2(efscfui, i32, env, i32)
> diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c
> index 093c5ec..b6e8c37 100644
> --- a/target-ppc/int_helper.c
> +++ b/target-ppc/int_helper.c
> @@ -2064,6 +2064,36 @@ void helper_##name(CPUPPCState *env, target_ulong xtn, \
> XXEXTRACT(xxextractuw, u32)
> #undef XXEXTRACT
>
> +#if defined(HOST_WORDS_BIGENDIAN)
> +#define XXINSERT(name, element) \
> +void helper_##name(CPUPPCState *env, target_ulong xtn, \
> + target_ulong xbn, uint32_t index) \
Again, you should be able to use an element size parameter, rather
than generating multiple helpers.
> +{ \
> + ppc_vsr_t xt, xb; \
> + \
> + getVSR(xbn, &xb, env); \
> + getVSR(xtn, &xt, env); \
> + memmove(&xt.u8[index], &xb.u8[8 - sizeof(xt.element)], \
> + sizeof(xt.element[0]));
> \
You've already copied into the xt and xb temporaries, so memcpy()
should be safe here.
> + putVSR(xtn, &xt, env); \
> +}
> +#else
> +#define XXINSERT(name, element) \
> +void helper_##name(CPUPPCState *env, target_ulong xtn, \
> + target_ulong xbn, uint32_t index) \
> +{ \
> + ppc_vsr_t xt, xb; \
> + uint32_t d = (16 - index) - sizeof(xt.element[0]); \
> + \
> + getVSR(xbn, &xb, env); \
> + getVSR(xtn, &xt, env); \
> + memmove(&xt.u8[d], &xb.u8[8], sizeof(xt.element[0])); \
> + putVSR(xtn, &xt, env); \
> +}
> +#endif
> +XXINSERT(xxinsertw, u32)
> +#undef XXINSERT
> +
> #define VEXT_SIGNED(name, element, mask, cast, recast) \
> void helper_##name(ppc_avr_t *r, ppc_avr_t *b) \
> { \
> diff --git a/target-ppc/translate/vsx-impl.inc.c b/target-ppc/translate/vsx-impl.inc.c
> index a9c07c9..6a81b2e 100644
> --- a/target-ppc/translate/vsx-impl.inc.c
> +++ b/target-ppc/translate/vsx-impl.inc.c
> @@ -1162,7 +1162,7 @@ static void gen_xxsldwi(DisasContext *ctx)
> tcg_temp_free_i64(xtl);
> }
>
> -#define VSX_EXTRACT(name) \
> +#define VSX_EXTRACT_INSERT(name) \
> static void gen_##name(DisasContext *ctx) \
> { \
> TCGv xt, xb; \
> @@ -1187,7 +1187,8 @@ static void gen_##name(DisasContext *ctx) \
> tcg_temp_free_i32(t0); \
> }
>
> -VSX_EXTRACT(xxextractuw)
> +VSX_EXTRACT_INSERT(xxextractuw)
> +VSX_EXTRACT_INSERT(xxinsertw)
>
> #undef GEN_XX2FORM
> #undef GEN_XX3FORM
> diff --git a/target-ppc/translate/vsx-ops.inc.c b/target-ppc/translate/vsx-ops.inc.c
> index 3ce657d..0216efe 100644
> --- a/target-ppc/translate/vsx-ops.inc.c
> +++ b/target-ppc/translate/vsx-ops.inc.c
> @@ -277,6 +277,7 @@ GEN_XX2FORM(xxspltw, 0x08, 0x0A, PPC2_VSX),
> GEN_XX1FORM(xxspltib, 0x08, 0x0B, PPC2_ISA300),
> GEN_XX3FORM_DM(xxsldwi, 0x08, 0x00),
> GEN_XX2FORM_EXT(xxextractuw, 0x0A, 0x0A, PPC2_ISA300),
> +GEN_XX2FORM_EXT(xxinsertw, 0x0A, 0x0B, PPC2_ISA300),
>
> #define GEN_XXSEL_ROW(opc3) \
> GEN_HANDLER2_E(xxsel, "xxsel", 0x3C, 0x18, opc3, 0, PPC_NONE, PPC2_VSX), \
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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next prev parent reply other threads:[~2016-12-08 22:52 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-07 18:24 [Qemu-devel] [PATCH v1 ppc-for-2.9 0/9] POWER9 TCG enablements - part9 Nikunj A Dadhania
2016-12-07 18:24 ` [Qemu-devel] [PATCH v1 1/9] target-ppc: implement lxvl instruction Nikunj A Dadhania
2016-12-08 22:25 ` David Gibson
2016-12-09 5:54 ` Nikunj A Dadhania
2016-12-07 18:24 ` [Qemu-devel] [PATCH v1 2/9] target-ppc: implement lxvll instruction Nikunj A Dadhania
2016-12-07 18:24 ` [Qemu-devel] [PATCH v1 3/9] target-ppc: implement stxvl instruction Nikunj A Dadhania
2016-12-08 22:26 ` David Gibson
2016-12-09 5:54 ` Nikunj A Dadhania
2016-12-07 18:24 ` [Qemu-devel] [PATCH v1 4/9] target-ppc: implement stxvll instructions Nikunj A Dadhania
2016-12-07 18:24 ` [Qemu-devel] [PATCH v1 5/9] target-ppc: implement xxextractuw instruction Nikunj A Dadhania
2016-12-08 22:32 ` David Gibson
2016-12-07 18:24 ` [Qemu-devel] [PATCH v1 6/9] target-ppc: implement xxinsertw instruction Nikunj A Dadhania
2016-12-08 22:34 ` David Gibson [this message]
2016-12-07 18:25 ` [Qemu-devel] [PATCH v1 7/9] target-ppc: implement xsnegqp instruction Nikunj A Dadhania
2016-12-08 22:50 ` David Gibson
2016-12-07 18:25 ` [Qemu-devel] [PATCH v1 8/9] target-ppc: implement xscpsgnqp instruction Nikunj A Dadhania
2016-12-08 22:51 ` David Gibson
2016-12-07 18:25 ` [Qemu-devel] [PATCH v1 9/9] target-ppc: Add xxperm and xxpermr instructions Nikunj A Dadhania
2016-12-08 22:51 ` David Gibson
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