* [Qemu-devel] [PATCH] hw/intc/arm_gicv3_common: fix aff3 in typer
@ 2016-12-09 14:37 Andrew Jones
2016-12-13 12:44 ` Peter Maydell
0 siblings, 1 reply; 2+ messages in thread
From: Andrew Jones @ 2016-12-09 14:37 UTC (permalink / raw)
To: qemu-devel, qemu-arm; +Cc: peter.maydell
Signed-off-by: Andrew Jones <drjones@redhat.com>
---
hw/intc/arm_gicv3_common.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c
index 0f8c4b86e023..0aa9b9ca6655 100644
--- a/hw/intc/arm_gicv3_common.c
+++ b/hw/intc/arm_gicv3_common.c
@@ -204,7 +204,8 @@ static void arm_gicv3_common_realize(DeviceState *dev, Error **errp)
/* The CPU mp-affinity property is in MPIDR register format; squash
* the affinity bytes into 32 bits as the GICR_TYPER has them.
*/
- cpu_affid = (cpu_affid & 0xFF00000000ULL >> 8) | (cpu_affid & 0xFFFFFF);
+ cpu_affid = ((cpu_affid & 0xFF00000000ULL) >> 8) |
+ (cpu_affid & 0xFFFFFF);
s->cpu[i].gicr_typer = (cpu_affid << 32) |
(1 << 24) |
(i << 8) |
--
2.9.3
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [Qemu-devel] [PATCH] hw/intc/arm_gicv3_common: fix aff3 in typer
2016-12-09 14:37 [Qemu-devel] [PATCH] hw/intc/arm_gicv3_common: fix aff3 in typer Andrew Jones
@ 2016-12-13 12:44 ` Peter Maydell
0 siblings, 0 replies; 2+ messages in thread
From: Peter Maydell @ 2016-12-13 12:44 UTC (permalink / raw)
To: Andrew Jones; +Cc: QEMU Developers, qemu-arm
On 9 December 2016 at 14:37, Andrew Jones <drjones@redhat.com> wrote:
> Signed-off-by: Andrew Jones <drjones@redhat.com>
> ---
> hw/intc/arm_gicv3_common.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c
> index 0f8c4b86e023..0aa9b9ca6655 100644
> --- a/hw/intc/arm_gicv3_common.c
> +++ b/hw/intc/arm_gicv3_common.c
> @@ -204,7 +204,8 @@ static void arm_gicv3_common_realize(DeviceState *dev, Error **errp)
> /* The CPU mp-affinity property is in MPIDR register format; squash
> * the affinity bytes into 32 bits as the GICR_TYPER has them.
> */
> - cpu_affid = (cpu_affid & 0xFF00000000ULL >> 8) | (cpu_affid & 0xFFFFFF);
> + cpu_affid = ((cpu_affid & 0xFF00000000ULL) >> 8) |
> + (cpu_affid & 0xFFFFFF);
> s->cpu[i].gicr_typer = (cpu_affid << 32) |
> (1 << 24) |
> (i << 8) |
Oops :-)
Applied to target-arm.next for 2.9, thanks.
-- PMM
^ permalink raw reply [flat|nested] 2+ messages in thread
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2016-12-09 14:37 [Qemu-devel] [PATCH] hw/intc/arm_gicv3_common: fix aff3 in typer Andrew Jones
2016-12-13 12:44 ` Peter Maydell
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