From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Cc: Doug Evans <dje@google.com>
Subject: [Qemu-devel] [PULL 24/25] target-i386: Fix eflags.TF/#DB handling of syscall/sysret insns
Date: Thu, 22 Dec 2016 16:22:59 +0100 [thread overview]
Message-ID: <20161222152300.32395-25-pbonzini@redhat.com> (raw)
In-Reply-To: <20161222152300.32395-1-pbonzini@redhat.com>
From: Doug Evans <dje@google.com>
The syscall and sysret instructions behave a bit differently:
TF is checked after the instruction completes.
This allows the o/s to disable #DB at a syscall by adding TF to FMASK.
And then when the sysret is executed the #DB is taken "as if" the
syscall insn just completed.
Signed-off-by: Doug Evans <dje@google.com>
Message-Id: <94eb2c0bfa1c6a9fec0543057483@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target/i386/bpt_helper.c | 7 +++++++
target/i386/helper.h | 1 +
target/i386/translate.c | 29 ++++++++++++++++++++++++-----
3 files changed, 32 insertions(+), 5 deletions(-)
diff --git a/target/i386/bpt_helper.c b/target/i386/bpt_helper.c
index 6fd7fe0..b3efdc7 100644
--- a/target/i386/bpt_helper.c
+++ b/target/i386/bpt_helper.c
@@ -244,6 +244,13 @@ void helper_single_step(CPUX86State *env)
raise_exception(env, EXCP01_DB);
}
+void helper_rechecking_single_step(CPUX86State *env)
+{
+ if ((env->eflags & TF_MASK) != 0) {
+ helper_single_step(env);
+ }
+}
+
void helper_set_dr(CPUX86State *env, int reg, target_ulong t0)
{
#ifndef CONFIG_USER_ONLY
diff --git a/target/i386/helper.h b/target/i386/helper.h
index 4e859eb..bd9b2cf 100644
--- a/target/i386/helper.h
+++ b/target/i386/helper.h
@@ -79,6 +79,7 @@ DEF_HELPER_2(cmpxchg16b_unlocked, void, env, tl)
DEF_HELPER_2(cmpxchg16b, void, env, tl)
#endif
DEF_HELPER_1(single_step, void, env)
+DEF_HELPER_1(rechecking_single_step, void, env)
DEF_HELPER_1(cpuid, void, env)
DEF_HELPER_1(rdtsc, void, env)
DEF_HELPER_1(rdtscp, void, env)
diff --git a/target/i386/translate.c b/target/i386/translate.c
index 324103c..59e11fc 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -2500,8 +2500,10 @@ static void gen_bnd_jmp(DisasContext *s)
}
/* Generate an end of block. Trace exception is also generated if needed.
- If IIM, set HF_INHIBIT_IRQ_MASK if it isn't already set. */
-static void gen_eob_inhibit_irq(DisasContext *s, bool inhibit)
+ If INHIBIT, set HF_INHIBIT_IRQ_MASK if it isn't already set.
+ If RECHECK_TF, emit a rechecking helper for #DB, ignoring the state of
+ S->TF. This is used by the syscall/sysret insns. */
+static void gen_eob_worker(DisasContext *s, bool inhibit, bool recheck_tf)
{
gen_update_cc_op(s);
@@ -2517,6 +2519,9 @@ static void gen_eob_inhibit_irq(DisasContext *s, bool inhibit)
}
if (s->singlestep_enabled) {
gen_helper_debug(cpu_env);
+ } else if (recheck_tf) {
+ gen_helper_rechecking_single_step(cpu_env);
+ tcg_gen_exit_tb(0);
} else if (s->tf) {
gen_helper_single_step(cpu_env);
} else {
@@ -2525,10 +2530,17 @@ static void gen_eob_inhibit_irq(DisasContext *s, bool inhibit)
s->is_jmp = DISAS_TB_JUMP;
}
+/* End of block.
+ If INHIBIT, set HF_INHIBIT_IRQ_MASK if it isn't already set. */
+static void gen_eob_inhibit_irq(DisasContext *s, bool inhibit)
+{
+ gen_eob_worker(s, inhibit, false);
+}
+
/* End of block, resetting the inhibit irq flag. */
static void gen_eob(DisasContext *s)
{
- gen_eob_inhibit_irq(s, false);
+ gen_eob_worker(s, false, false);
}
/* generate a jump to eip. No segment change must happen before as a
@@ -6423,7 +6435,10 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
tcg_const_i32(s->pc - s->cs_base));
set_cc_op(s, CC_OP_EFLAGS);
}
- gen_eob(s);
+ /* TF handling for the syscall insn is different. The TF bit is checked
+ after the syscall insn completes. This allows #DB to not be
+ generated after one has entered CPL0 if TF is set in FMASK. */
+ gen_eob_worker(s, false, true);
break;
case 0xe8: /* call im */
{
@@ -7115,7 +7130,11 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
if (s->lma) {
set_cc_op(s, CC_OP_EFLAGS);
}
- gen_eob(s);
+ /* TF handling for the sysret insn is different. The TF bit is
+ checked after the sysret insn completes. This allows #DB to be
+ generated "as if" the syscall insn in userspace has just
+ completed. */
+ gen_eob_worker(s, false, true);
}
break;
#endif
--
2.9.3
next prev parent reply other threads:[~2016-12-22 15:23 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-22 15:22 [Qemu-devel] [PULL 00/25] First round of misc patches for QEMU 2.9 Paolo Bonzini
2016-12-22 15:22 ` [Qemu-devel] [PULL 01/25] exec: optimize remaining address_space_* cases Paolo Bonzini
2016-12-22 15:22 ` [Qemu-devel] [PULL 02/25] exec: introduce memory_ldst.inc.c Paolo Bonzini
2016-12-22 15:22 ` [Qemu-devel] [PULL 03/25] exec: introduce address_space_extend_translation Paolo Bonzini
2016-12-22 15:22 ` [Qemu-devel] [PULL 04/25] exec: introduce MemoryRegionCache Paolo Bonzini
2016-12-22 15:22 ` [Qemu-devel] [PULL 05/25] watchdog: 6300esb: add exit function Paolo Bonzini
2016-12-22 15:22 ` [Qemu-devel] [PULL 06/25] rules.mak: speedup save-vars load-vars Paolo Bonzini
2016-12-22 15:22 ` [Qemu-devel] [PULL 07/25] rules.mak: add more rules to avoid chaining Paolo Bonzini
2016-12-22 15:22 ` [Qemu-devel] [PULL 08/25] build-sys: remove libtool left-over Paolo Bonzini
2016-12-22 15:22 ` [Qemu-devel] [PULL 09/25] virtio-scsi: introduce virtio_scsi_acquire/release Paolo Bonzini
2016-12-22 15:22 ` [Qemu-devel] [PULL 10/25] qemu-timer: check active_timers outside lock/event Paolo Bonzini
2016-12-22 15:22 ` [Qemu-devel] [PULL 11/25] timer: fix misleading comment in timer.h Paolo Bonzini
2016-12-22 15:22 ` [Qemu-devel] [PULL 12/25] main-loop: update comment for qemu_mutex_lock/unlock_iothread Paolo Bonzini
2016-12-22 15:22 ` [Qemu-devel] [PULL 13/25] block: drop remaining legacy aio functions in comment Paolo Bonzini
2016-12-22 15:22 ` [Qemu-devel] [PULL 14/25] target-i386: Add Intel SHA_NI instruction support Paolo Bonzini
2016-12-22 15:22 ` [Qemu-devel] [PULL 15/25] pc: make smbus configurable Paolo Bonzini
2016-12-22 15:22 ` [Qemu-devel] [PULL 16/25] pc: make sata configurable Paolo Bonzini
2016-12-22 15:22 ` [Qemu-devel] [PULL 17/25] pc: make pit configurable Paolo Bonzini
2016-12-22 15:22 ` [Qemu-devel] [PULL 18/25] x86: Fix x86_64 'g' packet response to gdb from 32-bit mode Paolo Bonzini
2016-12-22 15:22 ` [Qemu-devel] [PULL 19/25] multiboot: copy the cmdline verbatim, unescape module strings Paolo Bonzini
2016-12-22 15:22 ` [Qemu-devel] [PULL 20/25] hw/block/pflash_cfi*.c: fix confusing assert fail message Paolo Bonzini
2016-12-22 15:22 ` [Qemu-devel] [PULL 21/25] scsi-disk: fix VERIFY for scsi-block Paolo Bonzini
2017-01-09 19:42 ` Peter Maydell
2017-01-10 9:36 ` Paolo Bonzini
2016-12-22 15:22 ` [Qemu-devel] [PULL 22/25] kvm: sync linux headers Paolo Bonzini
2016-12-22 15:22 ` [Qemu-devel] [PULL 23/25] kvmclock: reduce kvmclock difference on migration Paolo Bonzini
2016-12-22 15:22 ` Paolo Bonzini [this message]
2016-12-22 15:23 ` [Qemu-devel] [PULL 25/25] x86: implement la57 paging mode Paolo Bonzini
2016-12-22 15:58 ` [Qemu-devel] [PULL 00/25] First round of misc patches for QEMU 2.9 no-reply
2016-12-23 11:15 ` Peter Maydell
2016-12-23 12:12 ` Paolo Bonzini
2016-12-23 12:33 ` Peter Maydell
-- strict thread matches above, loose matches on Subject: below --
2016-12-23 19:33 [Qemu-devel] [PULL 24/25] target-i386: Fix eflags.TF/#DB handling of syscall/sysret insns Doug Evans
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20161222152300.32395-25-pbonzini@redhat.com \
--to=pbonzini@redhat.com \
--cc=dje@google.com \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).