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From: David Gibson <david@gibson.dropbear.id.au>
To: "Hervé Poussineau" <hpoussin@reactos.org>
Cc: qemu-devel@nongnu.org, Alexander Graf <agraf@suse.de>,
	qemu-ppc@nongnu.org, Thomas Huth <thuth@redhat.com>,
	Giancarlo Teodori <gteodori@gmail.com>
Subject: Re: [Qemu-devel] [PATCH 5/6] prep: add IBM RS/6000 7020 (40p) memory controller
Date: Wed, 4 Jan 2017 10:39:37 +1100	[thread overview]
Message-ID: <20170103233937.GT12761@umbus.fritz.box> (raw)
In-Reply-To: <0e3da19e-d070-f901-f9e5-f68d552cef72@reactos.org>

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On Tue, Jan 03, 2017 at 11:55:10PM +0100, Hervé Poussineau wrote:
> Le 03/01/2017 à 05:57, David Gibson a écrit :
> > On Thu, Dec 29, 2016 at 11:12:15PM +0100, Hervé Poussineau wrote:
> > > Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
> > > ---
> > >  default-configs/ppc-softmmu.mak |   1 +
> > >  hw/ppc/Makefile.objs            |   1 +
> > >  hw/ppc/rs6000_mc.c              | 232 ++++++++++++++++++++++++++++++++++++++++
> > >  hw/ppc/trace-events             |   7 ++
> > >  4 files changed, 241 insertions(+)
> > >  create mode 100644 hw/ppc/rs6000_mc.c
> > > 
> > > diff --git a/default-configs/ppc-softmmu.mak b/default-configs/ppc-softmmu.mak
> > > index d4d0f9b..e567658 100644
> > > --- a/default-configs/ppc-softmmu.mak
> > > +++ b/default-configs/ppc-softmmu.mak
> > > @@ -47,3 +47,4 @@ CONFIG_LIBDECNUMBER=y
> > >  # For PReP
> > >  CONFIG_MC146818RTC=y
> > >  CONFIG_ISA_TESTDEV=y
> > > +CONFIG_RS6000_MC=y
> > > diff --git a/hw/ppc/Makefile.objs b/hw/ppc/Makefile.objs
> > > index db72297..0012934 100644
> > > --- a/hw/ppc/Makefile.objs
> > > +++ b/hw/ppc/Makefile.objs
> > > @@ -17,6 +17,7 @@ obj-y += ppc4xx_pci.o
> > >  # PReP
> > >  obj-$(CONFIG_PREP) += prep.o
> > >  obj-$(CONFIG_PREP) += prep_systemio.o
> > > +obj-${CONFIG_RS6000_MC} += rs6000_mc.o
> > >  # OldWorld PowerMac
> > >  obj-$(CONFIG_MAC) += mac_oldworld.o
> > >  # NewWorld PowerMac
> > > diff --git a/hw/ppc/rs6000_mc.c b/hw/ppc/rs6000_mc.c
> > > new file mode 100644
> > > index 0000000..c684421
> > > --- /dev/null
> > > +++ b/hw/ppc/rs6000_mc.c
> > > @@ -0,0 +1,232 @@
> > > +/*
> > > + * QEMU RS/6000 memory controller
> > > + *
> > > + * Copyright (c) 2016 Hervé Poussineau
> > > + *
> > > + * This program is free software: you can redistribute it and/or modify
> > > + * it under the terms of the GNU General Public License as published by
> > > + * the Free Software Foundation, either version 2 of the License, or
> > > + * (at your option) version 3 or any later version.
> > > + *
> > > + * This program is distributed in the hope that it will be useful,
> > > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> > > + * GNU General Public License for more details.
> > > + *
> > > + * You should have received a copy of the GNU General Public License
> > > + * along with this program.  If not, see <http://www.gnu.org/licenses/>.
> > > + */
> > > +
> > > +#include "qemu/osdep.h"
> > > +#include "hw/isa/isa.h"
> > > +#include "exec/address-spaces.h"
> > > +#include "hw/boards.h"
> > > +#include "qapi/error.h"
> > > +#include "trace.h"
> > > +
> > > +#define TYPE_RS6000MC "rs6000-mc"
> > > +#define RS6000MC_DEVICE(obj) \
> > > +    OBJECT_CHECK(RS6000MCState, (obj), TYPE_RS6000MC)
> > > +
> > > +typedef struct RS6000MCState {
> > > +    ISADevice parent_obj;
> > > +    /* see US patent 5,684,979 for details (expired 2001-11-04) */
> > > +    uint32_t ram_size;
> > > +    bool autoconfigure;
> > > +    MemoryRegion simm[6];
> > > +    unsigned int simm_size[6];
> > > +    uint32_t end_address[8];
> > > +    uint8_t port0820_index;
> > > +    PortioList portio;
> > > +} RS6000MCState;
> > > +
> > > +/* P0RT 0803 -- SIMM ID Register (32/8 MB) (Read Only) */
> > > +
> > > +static uint32_t rs6000mc_port0803_read(void *opaque, uint32_t addr)
> > > +{
> > > +    RS6000MCState *s = opaque;
> > > +    uint32_t val = 0;
> > > +    int socket;
> > > +
> > > +    /* (1 << socket) indicates 32 MB SIMM at given socket */
> > > +    for (socket = 0; socket < 6; socket++) {
> > > +        if (s->simm_size[socket] == 32) {
> > > +            val |= (1 << socket);
> > > +        }
> > > +    }
> > > +
> > > +    trace_rs6000mc_id_read(addr, val);
> > > +    return val;
> > > +}
> > > +
> > > +/* PORT 0804 -- SIMM Presence Register (Read Only) */
> > > +
> > > +static uint32_t rs6000mc_port0804_read(void *opaque, uint32_t addr)
> > > +{
> > > +    RS6000MCState *s = opaque;
> > > +    uint32_t val = 0xff;
> > > +    int socket;
> > > +
> > > +    /* (1 << socket) indicates SIMM absence at given socket */
> > > +    for (socket = 0; socket < 6; socket++) {
> > > +        if (s->simm_size[socket]) {
> > > +            val &= ~(1 << socket);
> > > +        }
> > > +    }
> > > +    s->port0820_index = 0;
> > > +
> > > +    trace_rs6000mc_presence_read(addr, val);
> > > +    return val;
> > > +}
> > > +
> > > +/* Memory Controller Size Programming Register */
> > > +
> > > +static uint32_t rs6000mc_port0820_read(void *opaque, uint32_t addr)
> > > +{
> > > +    RS6000MCState *s = opaque;
> > > +    uint32_t val = s->end_address[s->port0820_index] & 0x1f;
> > > +    s->port0820_index = (s->port0820_index + 1) & 7;
> > > +    trace_rs6000mc_size_read(addr, val);
> > > +    return val;
> > > +}
> > > +
> > > +static void rs6000mc_port0820_write(void *opaque, uint32_t addr, uint32_t val)
> > > +{
> > > +    RS6000MCState *s = opaque;
> > > +    uint8_t socket = val >> 5;
> > > +    uint32_t end_address = val & 0x1f;
> > > +
> > > +    trace_rs6000mc_size_write(addr, val);
> > > +    s->end_address[socket] = end_address;
> > > +    if (socket > 0 && socket < 7) {
> > > +        if (s->simm_size[socket - 1]) {
> > > +            uint32_t size;
> > > +            uint32_t start_address = 0;
> > > +            if (socket > 1) {
> > > +                start_address = s->end_address[socket - 1];
> > > +            }
> > > +
> > > +            size = end_address - start_address;
> > > +            memory_region_set_enabled(&s->simm[socket - 1], size != 0);
> > > +            memory_region_set_address(&s->simm[socket - 1],
> > > +                                      start_address * 8 * 1024 * 1024);
> > > +        }
> > > +    }
> > > +}
> > > +
> > > +/* Read Memory Parity Error */
> > > +
> > > +enum {
> > > +    PORT0841_NO_ERROR_DETECTED = 0x01,
> > > +};
> > > +
> > > +static uint32_t rs6000mc_port0841_read(void *opaque, uint32_t addr)
> > > +{
> > > +    uint32_t val = PORT0841_NO_ERROR_DETECTED;
> > > +    trace_rs6000mc_parity_read(addr, val);
> > > +    return val;
> > > +}
> > > +
> > > +static const MemoryRegionPortio rs6000mc_port_list[] = {
> > > +    { 0x803, 1, 1, .read = rs6000mc_port0803_read },
> > > +    { 0x804, 1, 1, .read = rs6000mc_port0804_read },
> > > +    { 0x820, 1, 1, .read = rs6000mc_port0820_read,
> > > +                   .write = rs6000mc_port0820_write, },
> > > +    { 0x841, 1, 1, .read = rs6000mc_port0841_read },
> > > +    PORTIO_END_OF_LIST()
> > > +};
> > > +
> > > +static void rs6000mc_realize(DeviceState *dev, Error **errp)
> > > +{
> > > +    RS6000MCState *s = RS6000MC_DEVICE(dev);
> > > +    int socket = 0;
> > > +    unsigned int ram_size = s->ram_size / (1024 * 1024);
> > > +
> > > +    while (socket < 6) {
> > > +        if (ram_size >= 64) {
> > > +            s->simm_size[socket] = 32;
> > > +            s->simm_size[socket + 1] = 32;
> > > +            ram_size -= 64;
> > > +        } else if (ram_size >= 16) {
> > > +            s->simm_size[socket] = 8;
> > > +            s->simm_size[socket + 1] = 8;
> > > +            ram_size -= 16;
> > > +        } else {
> > > +            /* Not enough memory */
> > > +            break;
> > > +        }
> > > +        socket += 2;
> > > +    }
> > 
> > Surely this needs some warning if you try to set ram-size greater than
> > the hardware can support (192MiB, IIUC).
> 
> 10 lines later, if you were unable to map the whole requested RAM, you'll get an error.

Sorry, missed that.

> >> +    if (ram_size) {
> >> +        /* unable to push all requested RAM in SIMMs */
> >> +        error_setg(errp, "RAM size incompatible with this board. "
> >> +                   "Try again with something else, like %d MB",
> >> +                   s->ram_size / 1024 / 1024 - ram_size);
> >> +        return;
> >> +    }
> 
> Is it enough?


Yes, that should be fine.

> > > +    for (socket = 0; socket < 6; socket++) {
> > > +        if (s->simm_size[socket]) {
> > > +            char name[] = "simm.?";
> > > +            name[5] = socket + '0';
> > > +            memory_region_allocate_system_memory(&s->simm[socket], OBJECT(dev),
> > > +                                                 name, s->simm_size[socket]
> > > +                                                 * 1024 * 1024);
> > > +            memory_region_add_subregion_overlap(get_system_memory(), 0,
> > > +                                                &s->simm[socket], socket);
> > > +        }
> > > +    }
> > > +    if (ram_size) {
> > > +        /* unable to push all requested RAM in SIMMs */
> > > +        error_setg(errp, "RAM size incompatible with this board. "
> > > +                   "Try again with something else, like %d MB",
> > > +                   s->ram_size / 1024 / 1024 - ram_size);
> > > +        return;
> > > +    }
> > > +
> > > +    if (s->autoconfigure) {
> > > +        uint32_t start_address = 0;
> > > +        for (socket = 0; socket < 6; socket++) {
> > > +            if (s->simm_size[socket]) {
> > > +                memory_region_set_enabled(&s->simm[socket], true);
> > > +                memory_region_set_address(&s->simm[socket], start_address);
> > > +                start_address += memory_region_size(&s->simm[socket]);
> > > +            }
> > > +        }
> > > +    }
> > > +
> > > +    isa_register_portio_list(ISA_DEVICE(dev), &s->portio, 0x0,
> > > +                             rs6000mc_port_list, s, "rs6000mc");
> > > +}
> > > +
> > > +static const VMStateDescription vmstate_rs6000mc = {
> > > +    .name = "rs6000-mc",
> > > +    .version_id = 1,
> > > +    .minimum_version_id = 1,
> > > +    .fields = (VMStateField[]) {
> > > +        VMSTATE_UINT8(port0820_index, RS6000MCState),
> > > +        VMSTATE_END_OF_LIST()
> > > +    },
> > > +};
> > > +
> > > +static Property rs6000mc_properties[] = {
> > > +    DEFINE_PROP_UINT32("ram-size", RS6000MCState, ram_size, 0),
> > > +    DEFINE_PROP_BOOL("auto-configure", RS6000MCState, autoconfigure, true),
> > > +    DEFINE_PROP_END_OF_LIST()
> > > +};
> > > +
> > > +static void rs6000mc_class_initfn(ObjectClass *klass, void *data)
> > > +{
> > > +    DeviceClass *dc = DEVICE_CLASS(klass);
> > > +
> > > +    dc->realize = rs6000mc_realize;
> > > +    dc->vmsd = &vmstate_rs6000mc;
> > > +    dc->props = rs6000mc_properties;
> > > +}
> > > +
> > > +static const TypeInfo rs6000mc_info = {
> > > +    .name          = TYPE_RS6000MC,
> > > +    .parent        = TYPE_ISA_DEVICE,
> > > +    .instance_size = sizeof(RS6000MCState),
> > > +    .class_init    = rs6000mc_class_initfn,
> > > +};
> > > +
> > > +static void rs6000mc_types(void)
> > > +{
> > > +    type_register_static(&rs6000mc_info);
> > > +}
> > > +
> > > +type_init(rs6000mc_types)
> > > diff --git a/hw/ppc/trace-events b/hw/ppc/trace-events
> > > index 2ba6166..42b8ec0 100644
> > > --- a/hw/ppc/trace-events
> > > +++ b/hw/ppc/trace-events
> > > @@ -78,3 +78,10 @@ prep_io_800_readb(uint32_t addr, uint32_t retval) "0x%08" PRIx32 " <= 0x%02" PRI
> > >  # hw/ppc/prep_systemio.c
> > >  prep_systemio_read(uint32_t addr, uint32_t val) "read addr=%x val=%x"
> > >  prep_systemio_write(uint32_t addr, uint32_t val) "write addr=%x val=%x"
> > > +
> > > +# hw/ppc/rs6000_mc.c
> > > +rs6000mc_id_read(uint32_t addr, uint32_t val) "read addr=%x val=%x"
> > > +rs6000mc_presence_read(uint32_t addr, uint32_t val) "read addr=%x val=%x"
> > > +rs6000mc_size_read(uint32_t addr, uint32_t val) "read addr=%x val=%x"
> > > +rs6000mc_size_write(uint32_t addr, uint32_t val) "write addr=%x val=%x"
> > > +rs6000mc_parity_read(uint32_t addr, uint32_t val) "read addr=%x val=%x"
> > 
> 

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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  reply	other threads:[~2017-01-04  0:21 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-12-29 22:12 [Qemu-devel] [PATCH 0/6] ppc: add a IBM 40p machine (RS/6000, PReP) Hervé Poussineau
2016-12-29 22:12 ` [Qemu-devel] [PATCH 1/6] pci: add pci_vga_type(), giving the device name of the chosen VGA device Hervé Poussineau
2017-01-02 23:01   ` David Gibson
2017-01-10  3:14     ` Michael S. Tsirkin
2017-01-10 21:00       ` Hervé Poussineau
2016-12-29 22:12 ` [Qemu-devel] [PATCH 2/6] vga: increase priority of 0xa0000 memory region Hervé Poussineau
2017-01-02 23:02   ` David Gibson
2017-01-03 22:37     ` Hervé Poussineau
2017-01-04  0:05       ` David Gibson
2016-12-29 22:12 ` [Qemu-devel] [PATCH 3/6] prep: do not use global variable to access nvram Hervé Poussineau
2017-01-03  3:51   ` David Gibson
2016-12-29 22:12 ` [Qemu-devel] [PATCH 4/6] prep: QOM'ify System I/O Hervé Poussineau
2017-01-02 23:03   ` David Gibson
2017-01-03 22:51     ` Hervé Poussineau
2017-01-03 23:39       ` David Gibson
2017-01-03  4:45   ` David Gibson
2017-01-04 21:17     ` Hervé Poussineau
2017-01-05  0:41       ` David Gibson
2017-01-05 20:57         ` Hervé Poussineau
2016-12-29 22:12 ` [Qemu-devel] [PATCH 5/6] prep: add IBM RS/6000 7020 (40p) memory controller Hervé Poussineau
2017-01-03  4:57   ` David Gibson
2017-01-03 22:55     ` Hervé Poussineau
2017-01-03 23:39       ` David Gibson [this message]
2016-12-29 22:12 ` [Qemu-devel] [PATCH 6/6] prep: add IBM RS/6000 7020 (40p) machine emulation Hervé Poussineau
2017-01-03  5:02   ` David Gibson
2017-05-08 20:49   ` Eduardo Habkost
2017-05-08 21:32     ` Hervé Poussineau
2017-01-11 16:58 ` [Qemu-devel] [PATCH 0/6] ppc: add a IBM 40p machine (RS/6000, PReP) Artyom Tarasenko
2017-01-11 23:18   ` David Gibson
2017-01-12 12:57   ` Hervé Poussineau
2017-01-12 13:46     ` Artyom Tarasenko
2017-01-13 12:23     ` Mark Cave-Ayland
2017-01-13 13:26       ` Thomas Huth
2017-01-13 13:30       ` Artyom Tarasenko
2017-01-14 13:11       ` Hervé Poussineau
2017-01-15 19:23         ` Artyom Tarasenko

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