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From: David Gibson <david@gibson.dropbear.id.au>
To: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Cc: qemu-ppc@nongnu.org, rth@twiddle.net, qemu-devel@nongnu.org,
	bharata@linux.vnet.ibm.com
Subject: Re: [Qemu-devel] [PATCH v1 02/14] target-ppc: Add xxinsertw instruction
Date: Sat, 7 Jan 2017 12:02:49 +1100	[thread overview]
Message-ID: <20170107010249.GP13763@umbus.fritz.box> (raw)
In-Reply-To: <87pok01tjw.fsf@abhimanyu.i-did-not-set--mail-host-address--so-tickle-me>

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On Fri, Jan 06, 2017 at 01:58:19PM +0530, Nikunj A Dadhania wrote:
> David Gibson <david@gibson.dropbear.id.au> writes:
> 
> > [ Unknown signature status ]
> > On Fri, Jan 06, 2017 at 11:44:44AM +0530, Nikunj A Dadhania wrote:
> >> xxinsertw: VSX Vector Insert Word
> >> 
> >> Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
> >
> > The comments I had about out of bounds shifts don't seem to have been
> > addressed here.
> 
> Bounds are addressed inside the for condition:
> 
> #if defined(HOST_WORDS_BIGENDIAN)
>     ins_index = index;
>     for (i = 0; i < es && ins_index < 16; i++, ins_index++) {
>                           ^^^^^^^^^^^^^^
>         xt.u8[ins_index] = xb.u8[8 - es + i];
>     }
> #else
>     ins_index = 15 - index;
>     for (i = es - 1; i >= 0 && ins_index >= 0; i--, ins_index--) {
>                                ^^^^^^^^^^^^^^
>         xt.u8[ins_index] = xb.u8[8 + i];
>     }
> #endif
> 
> That way ins_index will be within 0 - 15. Let me know if I have missed
> something.

Oh, yes, I missed that.  Sorry.
-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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  reply	other threads:[~2017-01-07  7:52 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-06  6:14 [Qemu-devel] [PATCH v1 00/14] POWER9 TCG enablements - part10 Nikunj A Dadhania
2017-01-06  6:14 ` [Qemu-devel] [PATCH v1 01/14] target-ppc: Add xxextractuw instruction Nikunj A Dadhania
2017-01-06  6:14 ` [Qemu-devel] [PATCH v1 02/14] target-ppc: Add xxinsertw instruction Nikunj A Dadhania
2017-01-06  7:54   ` David Gibson
2017-01-06  8:28     ` Nikunj A Dadhania
2017-01-07  1:02       ` David Gibson [this message]
2017-01-07  1:03   ` David Gibson
2017-01-06  6:14 ` [Qemu-devel] [PATCH v1 03/14] target-ppc: Use float64 arg in helper_compute_fprf() Nikunj A Dadhania
2017-01-06  6:14 ` [Qemu-devel] [PATCH v1 04/14] target-ppc: Replace isden by float64_is_zero_or_denormal Nikunj A Dadhania
2017-01-06  6:14 ` [Qemu-devel] [PATCH v1 05/14] target-ppc: Rename helper_compute_fprf to helper_compute_fprf_float64 Nikunj A Dadhania
2017-01-06  6:14 ` [Qemu-devel] [PATCH v1 06/14] target-ppc: Add xsaddqp instructions Nikunj A Dadhania
2017-01-06  6:14 ` [Qemu-devel] [PATCH v1 07/14] target-ppc: Add xscvdphp, xscvhpdp Nikunj A Dadhania
2017-01-06  6:14 ` [Qemu-devel] [PATCH v1 08/14] target-ppc: Use correct precision for FPRF setting Nikunj A Dadhania
2017-01-06  6:14 ` [Qemu-devel] [PATCH v1 09/14] target-ppc: Add xscvdpqp instruction Nikunj A Dadhania
2017-01-06  6:14 ` [Qemu-devel] [PATCH v1 10/14] target-ppc: Add xscvqpdp instruction Nikunj A Dadhania
2017-01-06  6:14 ` [Qemu-devel] [PATCH v1 11/14] target-ppc: Add xsxexpdp instruction Nikunj A Dadhania
2017-01-06  6:14 ` [Qemu-devel] [PATCH v1 12/14] target-ppc: Add xsxexpqp instruction Nikunj A Dadhania
2017-01-06  6:14 ` [Qemu-devel] [PATCH v1 13/14] target-ppc: Add xsxsigdp instruction Nikunj A Dadhania
2017-01-06  6:14 ` [Qemu-devel] [PATCH v1 14/14] target-ppc: Add xsxsigqp instructions Nikunj A Dadhania
2017-01-09  2:49 ` [Qemu-devel] [PATCH v1 00/14] POWER9 TCG enablements - part10 David Gibson
2017-01-09  6:51   ` Nikunj A Dadhania

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