From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, "Alex Bennée" <alex.bennee@linaro.org>
Subject: [Qemu-devel] [PULL 62/65] tests: New test-bitcnt
Date: Tue, 10 Jan 2017 18:18:17 -0800 [thread overview]
Message-ID: <20170111021820.24416-63-rth@twiddle.net> (raw)
In-Reply-To: <20170111021820.24416-1-rth@twiddle.net>
From: Alex Bennée <alex.bennee@linaro.org>
Add some unit tests for bit count functions (currently only ctpop). As
the routines are based on the Hackers Delight optimisations I based
the test patterns on their tests.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
tests/.gitignore | 1 +
tests/Makefile.include | 2 +
tests/test-bitcnt.c | 140 +++++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 143 insertions(+)
create mode 100644 tests/test-bitcnt.c
diff --git a/tests/.gitignore b/tests/.gitignore
index e9b182e..7357d0a 100644
--- a/tests/.gitignore
+++ b/tests/.gitignore
@@ -13,6 +13,7 @@ rcutorture
test-aio
test-base64
test-bitops
+test-bitcnt
test-blockjob
test-blockjob-txn
test-bufferiszero
diff --git a/tests/Makefile.include b/tests/Makefile.include
index f776404..2029013 100644
--- a/tests/Makefile.include
+++ b/tests/Makefile.include
@@ -81,6 +81,7 @@ gcov-files-test-qht-y = util/qht.c
check-unit-y += tests/test-qht-par$(EXESUF)
gcov-files-test-qht-par-y = util/qht.c
check-unit-y += tests/test-bitops$(EXESUF)
+check-unit-y += tests/test-bitcnt$(EXESUF)
check-unit-$(CONFIG_HAS_GLIB_SUBPROCESS_TESTS) += tests/test-qdev-global-props$(EXESUF)
check-unit-y += tests/check-qom-interface$(EXESUF)
gcov-files-check-qom-interface-y = qom/object.c
@@ -571,6 +572,7 @@ tests/test-opts-visitor$(EXESUF): tests/test-opts-visitor.o $(test-qapi-obj-y)
tests/test-mul64$(EXESUF): tests/test-mul64.o $(test-util-obj-y)
tests/test-bitops$(EXESUF): tests/test-bitops.o $(test-util-obj-y)
+tests/test-bitcnt$(EXESUF): tests/test-bitcnt.o $(test-util-obj-y)
tests/test-crypto-hash$(EXESUF): tests/test-crypto-hash.o $(test-crypto-obj-y)
tests/test-crypto-hmac$(EXESUF): tests/test-crypto-hmac.o $(test-crypto-obj-y)
tests/test-crypto-cipher$(EXESUF): tests/test-crypto-cipher.o $(test-crypto-obj-y)
diff --git a/tests/test-bitcnt.c b/tests/test-bitcnt.c
new file mode 100644
index 0000000..e153dcb
--- /dev/null
+++ b/tests/test-bitcnt.c
@@ -0,0 +1,140 @@
+/*
+ * Test bit count routines
+ *
+ * This work is licensed under the terms of the GNU LGPL, version 2 or later.
+ * See the COPYING.LIB file in the top-level directory.
+ *
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/host-utils.h"
+
+struct bitcnt_test_data {
+ /* value to count */
+ union {
+ uint8_t w8;
+ uint16_t w16;
+ uint32_t w32;
+ uint64_t w64;
+ } value;
+ /* expected result */
+ int popct;
+};
+
+struct bitcnt_test_data eight_bit_data[] = {
+ { { .w8 = 0x00 }, .popct=0 },
+ { { .w8 = 0x01 }, .popct=1 },
+ { { .w8 = 0x03 }, .popct=2 },
+ { { .w8 = 0x04 }, .popct=1 },
+ { { .w8 = 0x0f }, .popct=4 },
+ { { .w8 = 0x3f }, .popct=6 },
+ { { .w8 = 0x40 }, .popct=1 },
+ { { .w8 = 0xf0 }, .popct=4 },
+ { { .w8 = 0x7f }, .popct=7 },
+ { { .w8 = 0x80 }, .popct=1 },
+ { { .w8 = 0xf1 }, .popct=5 },
+ { { .w8 = 0xfe }, .popct=7 },
+ { { .w8 = 0xff }, .popct=8 },
+};
+
+static void test_ctpop8(void)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(eight_bit_data); i++) {
+ struct bitcnt_test_data *d = &eight_bit_data[i];
+ g_assert(ctpop8(d->value.w8)==d->popct);
+ }
+}
+
+struct bitcnt_test_data sixteen_bit_data[] = {
+ { { .w16 = 0x0000 }, .popct=0 },
+ { { .w16 = 0x0001 }, .popct=1 },
+ { { .w16 = 0x0003 }, .popct=2 },
+ { { .w16 = 0x000f }, .popct=4 },
+ { { .w16 = 0x003f }, .popct=6 },
+ { { .w16 = 0x00f0 }, .popct=4 },
+ { { .w16 = 0x0f0f }, .popct=8 },
+ { { .w16 = 0x1f1f }, .popct=10 },
+ { { .w16 = 0x4000 }, .popct=1 },
+ { { .w16 = 0x4001 }, .popct=2 },
+ { { .w16 = 0x7000 }, .popct=3 },
+ { { .w16 = 0x7fff }, .popct=15 },
+};
+
+static void test_ctpop16(void)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(sixteen_bit_data); i++) {
+ struct bitcnt_test_data *d = &sixteen_bit_data[i];
+ g_assert(ctpop16(d->value.w16)==d->popct);
+ }
+}
+
+struct bitcnt_test_data thirtytwo_bit_data[] = {
+ { { .w32 = 0x00000000 }, .popct=0 },
+ { { .w32 = 0x00000001 }, .popct=1 },
+ { { .w32 = 0x0000000f }, .popct=4 },
+ { { .w32 = 0x00000f0f }, .popct=8 },
+ { { .w32 = 0x00001f1f }, .popct=10 },
+ { { .w32 = 0x00004001 }, .popct=2 },
+ { { .w32 = 0x00007000 }, .popct=3 },
+ { { .w32 = 0x00007fff }, .popct=15 },
+ { { .w32 = 0x55555555 }, .popct=16 },
+ { { .w32 = 0xaaaaaaaa }, .popct=16 },
+ { { .w32 = 0xff000000 }, .popct=8 },
+ { { .w32 = 0xc0c0c0c0 }, .popct=8 },
+ { { .w32 = 0x0ffffff0 }, .popct=24 },
+ { { .w32 = 0x80000000 }, .popct=1 },
+ { { .w32 = 0xffffffff }, .popct=32 },
+};
+
+static void test_ctpop32(void)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(thirtytwo_bit_data); i++) {
+ struct bitcnt_test_data *d = &thirtytwo_bit_data[i];
+ g_assert(ctpop32(d->value.w32)==d->popct);
+ }
+}
+
+struct bitcnt_test_data sixtyfour_bit_data[] = {
+ { { .w64 = 0x0000000000000000ULL }, .popct=0 },
+ { { .w64 = 0x0000000000000001ULL }, .popct=1 },
+ { { .w64 = 0x000000000000000fULL }, .popct=4 },
+ { { .w64 = 0x0000000000000f0fULL }, .popct=8 },
+ { { .w64 = 0x0000000000001f1fULL }, .popct=10 },
+ { { .w64 = 0x0000000000004001ULL }, .popct=2 },
+ { { .w64 = 0x0000000000007000ULL }, .popct=3 },
+ { { .w64 = 0x0000000000007fffULL }, .popct=15 },
+ { { .w64 = 0x0000005500555555ULL }, .popct=16 },
+ { { .w64 = 0x00aa0000aaaa00aaULL }, .popct=16 },
+ { { .w64 = 0x000f000000f00000ULL }, .popct=8 },
+ { { .w64 = 0x0c0c0000c0c0c0c0ULL }, .popct=12 },
+ { { .w64 = 0xf00f00f0f0f0f000ULL }, .popct=24 },
+ { { .w64 = 0x8000000000000000ULL }, .popct=1 },
+ { { .w64 = 0xf0f0f0f0f0f0f0f0ULL }, .popct=32 },
+ { { .w64 = 0xffffffffffffffffULL }, .popct=64 },
+};
+
+static void test_ctpop64(void)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(sixtyfour_bit_data); i++) {
+ struct bitcnt_test_data *d = &sixtyfour_bit_data[i];
+ g_assert(ctpop64(d->value.w64)==d->popct);
+ }
+}
+
+int main(int argc, char **argv)
+{
+ g_test_init(&argc, &argv, NULL);
+ g_test_add_func("/bitcnt/ctpop8", test_ctpop8);
+ g_test_add_func("/bitcnt/ctpop16", test_ctpop16);
+ g_test_add_func("/bitcnt/ctpop32", test_ctpop32);
+ g_test_add_func("/bitcnt/ctpop64", test_ctpop64);
+ return g_test_run();
+}
--
2.9.3
next prev parent reply other threads:[~2017-01-11 2:19 UTC|newest]
Thread overview: 73+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-11 2:17 [Qemu-devel] [PULL 00/65] tcg 2.9 patch queue Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 01/65] tcg: Add field extraction primitives Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 02/65] tcg: Minor adjustments to deposit expanders Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 03/65] tcg: Add deposit_z expander Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 04/65] tcg/aarch64: Implement field extraction opcodes Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 05/65] tcg/arm: Move isa detection to tcg-target.h Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 06/65] tcg/arm: Implement field extraction opcodes Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 07/65] tcg/i386: " Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 08/65] tcg/mips: " Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 09/65] tcg/ppc: " Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 10/65] tcg/s390: Expose host facilities to tcg-target.h Richard Henderson
2017-01-13 9:18 ` Christian Borntraeger
2017-01-16 8:28 ` Christian Borntraeger
2017-01-11 2:17 ` [Qemu-devel] [PULL 11/65] tcg/s390: Implement field extraction opcodes Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 12/65] tcg/s390: Support deposit into zero Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 13/65] target-alpha: Use deposit and extract ops Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 14/65] target-arm: Use new " Richard Henderson
2017-01-14 19:41 ` Laszlo Ersek
2017-01-14 20:13 ` Richard Henderson
2017-01-16 23:05 ` Laszlo Ersek
2017-01-11 2:17 ` [Qemu-devel] [PULL 15/65] target-i386: " Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 16/65] target-mips: Use the new extract op Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 17/65] target-ppc: Use the new deposit and extract ops Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 18/65] target-s390x: " Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 19/65] tcg/optimize: Fold movcond 0/1 into setcond Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 20/65] tcg: Add markup for output requires new register Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 21/65] tcg: Transition flat op_defs array to a target callback Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 22/65] tcg: Pass the opcode width to target_parse_constraint Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 23/65] tcg: Allow an operand to be matching or a constant Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 24/65] tcg: Add clz and ctz opcodes Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 25/65] disas/i386.c: Handle tzcnt Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 26/65] disas/ppc: Handle popcnt and cnttz Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 27/65] target-alpha: Use the ctz and clz opcodes Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 28/65] target-cris: Use clz opcode Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 29/65] target-microblaze: " Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 30/65] target-mips: " Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 31/65] target-openrisc: Use clz and ctz opcodes Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 32/65] target-ppc: " Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 33/65] target-s390x: Use clz opcode Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 34/65] target-tilegx: Use clz and ctz opcodes Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 35/65] target-tricore: Use clz opcode Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 36/65] target-unicore32: " Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 37/65] target-xtensa: " Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 38/65] target-arm: " Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 39/65] target-i386: Use clz and ctz opcodes Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 40/65] tcg/ppc: Handle ctz and clz opcodes Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 41/65] tcg/aarch64: " Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 42/65] tcg/arm: " Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 43/65] tcg/mips: Handle clz opcode Richard Henderson
2017-01-11 2:17 ` [Qemu-devel] [PULL 44/65] tcg/s390: " Richard Henderson
2017-01-11 2:18 ` [Qemu-devel] [PULL 45/65] tcg/i386: Fuly convert tcg_target_op_def Richard Henderson
2017-01-11 2:18 ` [Qemu-devel] [PULL 46/65] tcg/i386: Hoist common arguments in tcg_out_op Richard Henderson
2017-01-11 2:18 ` [Qemu-devel] [PULL 47/65] tcg/i386: Allow bmi2 shiftx to have non-matching operands Richard Henderson
2017-01-11 2:18 ` [Qemu-devel] [PULL 48/65] tcg/i386: Handle ctz and clz opcodes Richard Henderson
2017-01-11 2:18 ` [Qemu-devel] [PULL 49/65] tcg/i386: Rely on undefined/undocumented behaviour of BSF/BSR Richard Henderson
2017-01-11 2:18 ` [Qemu-devel] [PULL 50/65] tcg: Add helpers for clrsb Richard Henderson
2017-01-11 2:18 ` [Qemu-devel] [PULL 51/65] target-arm: Use clrsb helper Richard Henderson
2017-01-11 2:18 ` [Qemu-devel] [PULL 52/65] target-tricore: " Richard Henderson
2017-01-11 2:18 ` [Qemu-devel] [PULL 53/65] target-xtensa: " Richard Henderson
2017-01-11 2:18 ` [Qemu-devel] [PULL 54/65] tcg: Add opcode for ctpop Richard Henderson
2017-01-11 2:18 ` [Qemu-devel] [PULL 55/65] target-alpha: Use ctpop helper Richard Henderson
2017-01-11 2:18 ` [Qemu-devel] [PULL 56/65] target-ppc: " Richard Henderson
2017-01-11 2:18 ` [Qemu-devel] [PULL 57/65] target-s390x: Avoid a loop for popcnt Richard Henderson
2017-01-11 2:18 ` [Qemu-devel] [PULL 58/65] target-sparc: Use ctpop helper Richard Henderson
2017-01-11 2:18 ` [Qemu-devel] [PULL 59/65] target-tilegx: " Richard Henderson
2017-01-11 2:18 ` [Qemu-devel] [PULL 60/65] target-i386: " Richard Henderson
2017-01-11 2:18 ` [Qemu-devel] [PULL 61/65] qemu/host-utils.h: Reduce the operation count in the fallback ctpop Richard Henderson
2017-01-11 2:18 ` Richard Henderson [this message]
2017-01-11 2:18 ` [Qemu-devel] [PULL 63/65] tcg: Use ctpop to generate ctz if needed Richard Henderson
2017-01-11 2:18 ` [Qemu-devel] [PULL 64/65] tcg/ppc: Handle ctpop opcode Richard Henderson
2017-01-11 2:18 ` [Qemu-devel] [PULL 65/65] tcg/i386: " Richard Henderson
2017-01-11 3:39 ` [Qemu-devel] [PULL 00/65] tcg 2.9 patch queue no-reply
2017-01-12 15:57 ` Peter Maydell
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