From: David Gibson <david@gibson.dropbear.id.au>
To: peter.maydell@linaro.org
Cc: agraf@suse.de, qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
thuth@redhat.com, lvivier@redhat.com, aik@ozlabs.ru,
mdroth@linux.vnet.ibm.com,
Bharata B Rao <bharata@linux.vnet.ibm.com>,
Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>,
David Gibson <david@gibson.dropbear.id.au>
Subject: [Qemu-devel] [PULL 53/67] target-ppc: Rename helper_compute_fprf to helper_compute_fprf_float64
Date: Thu, 12 Jan 2017 13:03:13 +1100 [thread overview]
Message-ID: <20170112020327.24882-54-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <20170112020327.24882-1-david@gibson.dropbear.id.au>
From: Bharata B Rao <bharata@linux.vnet.ibm.com>
Since helper_compute_fprf() works on float64 argument, rename it
to helper_compute_fprf_float64(). Also use a macro to generate
helper_compute_fprf_float64() so that float128 version of the same
helper can be introduced easily later.
Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
target/ppc/fpu_helper.c | 121 +++++++++++++++++++------------------
target/ppc/helper.h | 2 +-
target/ppc/translate/fp-impl.inc.c | 20 +++---
3 files changed, 73 insertions(+), 70 deletions(-)
diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index 5a7aa75..913d54e 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -57,54 +57,57 @@ static inline int ppc_float64_get_unbiased_exp(float64 f)
return ((f >> 52) & 0x7FF) - 1023;
}
-void helper_compute_fprf(CPUPPCState *env, float64 arg)
-{
- int isneg;
- int fprf;
-
- isneg = float64_is_neg(arg);
- if (unlikely(float64_is_any_nan(arg))) {
- if (float64_is_signaling_nan(arg, &env->fp_status)) {
- /* Signaling NaN: flags are undefined */
- fprf = 0x00;
- } else {
- /* Quiet NaN */
- fprf = 0x11;
- }
- } else if (unlikely(float64_is_infinity(arg))) {
- /* +/- infinity */
- if (isneg) {
- fprf = 0x09;
- } else {
- fprf = 0x05;
- }
- } else {
- if (float64_is_zero(arg)) {
- /* +/- zero */
- if (isneg) {
- fprf = 0x12;
- } else {
- fprf = 0x02;
- }
- } else {
- if (float64_is_zero_or_denormal(arg)) {
- /* Denormalized numbers */
- fprf = 0x10;
- } else {
- /* Normalized numbers */
- fprf = 0x00;
- }
- if (isneg) {
- fprf |= 0x08;
- } else {
- fprf |= 0x04;
- }
- }
- }
- /* We update FPSCR_FPRF */
- env->fpscr &= ~(0x1F << FPSCR_FPRF);
- env->fpscr |= fprf << FPSCR_FPRF;
-}
+#define COMPUTE_FPRF(tp) \
+void helper_compute_fprf_##tp(CPUPPCState *env, tp arg) \
+{ \
+ int isneg; \
+ int fprf; \
+ \
+ isneg = tp##_is_neg(arg); \
+ if (unlikely(tp##_is_any_nan(arg))) { \
+ if (tp##_is_signaling_nan(arg, &env->fp_status)) { \
+ /* Signaling NaN: flags are undefined */ \
+ fprf = 0x00; \
+ } else { \
+ /* Quiet NaN */ \
+ fprf = 0x11; \
+ } \
+ } else if (unlikely(tp##_is_infinity(arg))) { \
+ /* +/- infinity */ \
+ if (isneg) { \
+ fprf = 0x09; \
+ } else { \
+ fprf = 0x05; \
+ } \
+ } else { \
+ if (tp##_is_zero(arg)) { \
+ /* +/- zero */ \
+ if (isneg) { \
+ fprf = 0x12; \
+ } else { \
+ fprf = 0x02; \
+ } \
+ } else { \
+ if (tp##_is_zero_or_denormal(arg)) { \
+ /* Denormalized numbers */ \
+ fprf = 0x10; \
+ } else { \
+ /* Normalized numbers */ \
+ fprf = 0x00; \
+ } \
+ if (isneg) { \
+ fprf |= 0x08; \
+ } else { \
+ fprf |= 0x04; \
+ } \
+ } \
+ } \
+ /* We update FPSCR_FPRF */ \
+ env->fpscr &= ~(0x1F << FPSCR_FPRF); \
+ env->fpscr |= fprf << FPSCR_FPRF; \
+}
+
+COMPUTE_FPRF(float64)
/* Floating-point invalid operations exception */
static inline __attribute__((__always_inline__))
@@ -1808,7 +1811,7 @@ void helper_##name(CPUPPCState *env, uint32_t opcode) \
} \
\
if (sfprf) { \
- helper_compute_fprf(env, xt.fld); \
+ helper_compute_fprf_float64(env, xt.fld); \
} \
} \
putVSR(xT(opcode), &xt, env); \
@@ -1863,7 +1866,7 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \
} \
\
if (sfprf) { \
- helper_compute_fprf(env, xt.fld); \
+ helper_compute_fprf_float64(env, xt.fld); \
} \
} \
\
@@ -1917,7 +1920,7 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \
} \
\
if (sfprf) { \
- helper_compute_fprf(env, xt.fld); \
+ helper_compute_fprf_float64(env, xt.fld); \
} \
} \
\
@@ -1958,7 +1961,7 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \
} \
\
if (sfprf) { \
- helper_compute_fprf(env, xt.fld); \
+ helper_compute_fprf_float64(env, xt.fld); \
} \
} \
\
@@ -2007,7 +2010,7 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \
} \
\
if (sfprf) { \
- helper_compute_fprf(env, xt.fld); \
+ helper_compute_fprf_float64(env, xt.fld); \
} \
} \
\
@@ -2057,7 +2060,7 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \
} \
\
if (sfprf) { \
- helper_compute_fprf(env, xt.fld); \
+ helper_compute_fprf_float64(env, xt.fld); \
} \
} \
\
@@ -2257,7 +2260,7 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \
} \
\
if (sfprf) { \
- helper_compute_fprf(env, xt_out.fld); \
+ helper_compute_fprf_float64(env, xt_out.fld); \
} \
} \
putVSR(xT(opcode), &xt_out, env); \
@@ -2647,7 +2650,7 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \
xt.tfld = ttp##_snan_to_qnan(xt.tfld); \
} \
if (sfprf) { \
- helper_compute_fprf(env, ttp##_to_float64(xt.tfld, \
+ helper_compute_fprf_float64(env, ttp##_to_float64(xt.tfld, \
&env->fp_status)); \
} \
} \
@@ -2758,7 +2761,7 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \
xt.tfld = helper_frsp(env, xt.tfld); \
} \
if (sfprf) { \
- helper_compute_fprf(env, xt.tfld); \
+ helper_compute_fprf_float64(env, xt.tfld); \
} \
} \
\
@@ -2814,7 +2817,7 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \
xt.fld = tp##_round_to_int(xb.fld, &env->fp_status); \
} \
if (sfprf) { \
- helper_compute_fprf(env, xt.fld); \
+ helper_compute_fprf_float64(env, xt.fld); \
} \
} \
\
@@ -2854,7 +2857,7 @@ uint64_t helper_xsrsp(CPUPPCState *env, uint64_t xb)
uint64_t xt = helper_frsp(env, xb);
- helper_compute_fprf(env, xt);
+ helper_compute_fprf_float64(env, xt);
float_check_status(env);
return xt;
}
diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index 6c5b194..04e688d 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -61,7 +61,7 @@ DEF_HELPER_FLAGS_2(brinc, TCG_CALL_NO_RWG_SE, tl, tl, tl)
DEF_HELPER_1(float_check_status, void, env)
DEF_HELPER_1(reset_fpstatus, void, env)
-DEF_HELPER_2(compute_fprf, void, env, i64)
+DEF_HELPER_2(compute_fprf_float64, void, env, i64)
DEF_HELPER_3(store_fpscr, void, env, i64, i32)
DEF_HELPER_2(fpscr_clrbit, void, env, i32)
DEF_HELPER_2(fpscr_setbit, void, env, i32)
diff --git a/target/ppc/translate/fp-impl.inc.c b/target/ppc/translate/fp-impl.inc.c
index 872af7b..2fbd4d4 100644
--- a/target/ppc/translate/fp-impl.inc.c
+++ b/target/ppc/translate/fp-impl.inc.c
@@ -9,9 +9,9 @@ static inline void gen_reset_fpstatus(void)
gen_helper_reset_fpstatus(cpu_env);
}
-static inline void gen_compute_fprf(TCGv_i64 arg)
+static inline void gen_compute_fprf_float64(TCGv_i64 arg)
{
- gen_helper_compute_fprf(cpu_env, arg);
+ gen_helper_compute_fprf_float64(cpu_env, arg);
gen_helper_float_check_status(cpu_env);
}
@@ -47,7 +47,7 @@ static void gen_f##name(DisasContext *ctx) \
cpu_fpr[rD(ctx->opcode)]); \
} \
if (set_fprf) { \
- gen_compute_fprf(cpu_fpr[rD(ctx->opcode)]); \
+ gen_compute_fprf_float64(cpu_fpr[rD(ctx->opcode)]); \
} \
if (unlikely(Rc(ctx->opcode) != 0)) { \
gen_set_cr1_from_fpscr(ctx); \
@@ -74,7 +74,7 @@ static void gen_f##name(DisasContext *ctx) \
cpu_fpr[rD(ctx->opcode)]); \
} \
if (set_fprf) { \
- gen_compute_fprf(cpu_fpr[rD(ctx->opcode)]); \
+ gen_compute_fprf_float64(cpu_fpr[rD(ctx->opcode)]); \
} \
if (unlikely(Rc(ctx->opcode) != 0)) { \
gen_set_cr1_from_fpscr(ctx); \
@@ -100,7 +100,7 @@ static void gen_f##name(DisasContext *ctx) \
cpu_fpr[rD(ctx->opcode)]); \
} \
if (set_fprf) { \
- gen_compute_fprf(cpu_fpr[rD(ctx->opcode)]); \
+ gen_compute_fprf_float64(cpu_fpr[rD(ctx->opcode)]); \
} \
if (unlikely(Rc(ctx->opcode) != 0)) { \
gen_set_cr1_from_fpscr(ctx); \
@@ -121,7 +121,7 @@ static void gen_f##name(DisasContext *ctx) \
gen_helper_f##name(cpu_fpr[rD(ctx->opcode)], cpu_env, \
cpu_fpr[rB(ctx->opcode)]); \
if (set_fprf) { \
- gen_compute_fprf(cpu_fpr[rD(ctx->opcode)]); \
+ gen_compute_fprf_float64(cpu_fpr[rD(ctx->opcode)]); \
} \
if (unlikely(Rc(ctx->opcode) != 0)) { \
gen_set_cr1_from_fpscr(ctx); \
@@ -139,7 +139,7 @@ static void gen_f##name(DisasContext *ctx) \
gen_helper_f##name(cpu_fpr[rD(ctx->opcode)], cpu_env, \
cpu_fpr[rB(ctx->opcode)]); \
if (set_fprf) { \
- gen_compute_fprf(cpu_fpr[rD(ctx->opcode)]); \
+ gen_compute_fprf_float64(cpu_fpr[rD(ctx->opcode)]); \
} \
if (unlikely(Rc(ctx->opcode) != 0)) { \
gen_set_cr1_from_fpscr(ctx); \
@@ -174,7 +174,7 @@ static void gen_frsqrtes(DisasContext *ctx)
cpu_fpr[rB(ctx->opcode)]);
gen_helper_frsp(cpu_fpr[rD(ctx->opcode)], cpu_env,
cpu_fpr[rD(ctx->opcode)]);
- gen_compute_fprf(cpu_fpr[rD(ctx->opcode)]);
+ gen_compute_fprf_float64(cpu_fpr[rD(ctx->opcode)]);
if (unlikely(Rc(ctx->opcode) != 0)) {
gen_set_cr1_from_fpscr(ctx);
}
@@ -196,7 +196,7 @@ static void gen_fsqrt(DisasContext *ctx)
gen_reset_fpstatus();
gen_helper_fsqrt(cpu_fpr[rD(ctx->opcode)], cpu_env,
cpu_fpr[rB(ctx->opcode)]);
- gen_compute_fprf(cpu_fpr[rD(ctx->opcode)]);
+ gen_compute_fprf_float64(cpu_fpr[rD(ctx->opcode)]);
if (unlikely(Rc(ctx->opcode) != 0)) {
gen_set_cr1_from_fpscr(ctx);
}
@@ -213,7 +213,7 @@ static void gen_fsqrts(DisasContext *ctx)
cpu_fpr[rB(ctx->opcode)]);
gen_helper_frsp(cpu_fpr[rD(ctx->opcode)], cpu_env,
cpu_fpr[rD(ctx->opcode)]);
- gen_compute_fprf(cpu_fpr[rD(ctx->opcode)]);
+ gen_compute_fprf_float64(cpu_fpr[rD(ctx->opcode)]);
if (unlikely(Rc(ctx->opcode) != 0)) {
gen_set_cr1_from_fpscr(ctx);
}
--
2.9.3
next prev parent reply other threads:[~2017-01-12 2:04 UTC|newest]
Thread overview: 73+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-12 2:02 [Qemu-devel] [PULL 00/67] ppc-for-2.9 queue 20170112 David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 01/67] disas/ppc: Fix indefinite articles in comments David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 02/67] target-ppc: Consolidate instruction decode helpers David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 03/67] target-ppc: rename CRF_* defines as CRF_*_BIT David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 04/67] target-ppc: Fix xscmpodp and xscmpudp instructions David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 05/67] target-ppc: Add xscmpexp[dp, qp] instructions David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 06/67] target-ppc: Add xscmpoqp and xscmpuqp instructions David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 07/67] target-ppc: implement lxsd and lxssp instructions David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 08/67] target-ppc: implement stxsd and stxssp David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 09/67] target-ppc: implement lxv/lxvx and stxv/stxvx David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 10/67] target-ppc: Implement bcdcfsq. instruction David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 11/67] target-ppc: Implement bcdctsq. instruction David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 12/67] target-ppc: Implement bcdcpsgn. instruction David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 13/67] target-ppc: Implement bcdsetsgn. instruction David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 14/67] target-ppc: add vextu[bhw][lr]x instructions David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 15/67] pseries: Always use core objects for CPU construction David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 16/67] pseries: Make cpu_update during CAS unconditional David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 17/67] ppc: Clean up and QOMify hypercall emulation David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 18/67] ppc: Rename cpu_version to compat_pvr David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 19/67] ppc/spapr: implement H_SIGNAL_SYS_RESET David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 20/67] target-ppc: move ppc_vsr_t to common header David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 21/67] target-ppc: implement stop instruction David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 22/67] target-ppc: implement xsabsqp/xsnabsqp instruction David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 23/67] target-ppc: Implement bcd_is_valid function David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 24/67] target-ppc: implement xsnegqp instruction David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 25/67] target-ppc: implement xscpsgnqp instruction David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 26/67] target-ppc: Add xxperm and xxpermr instructions David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 27/67] target-ppc: implement lxvl instruction David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 28/67] target-ppc: implement lxvll instruction David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 29/67] target-ppc: implement stxvl instruction David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 30/67] target-ppc: implement stxvll instructions David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 31/67] hw/ppc/spapr: Fix boot path of usb-host storage devices David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 32/67] prep: do not use global variable to access nvram David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 33/67] pseries: Add pseries-2.9 machine type David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 34/67] ppc: Rewrite ppc_set_compat() David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 35/67] ppc: Rewrite ppc_get_compat_smt_threads() David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 36/67] ppc: Validate compatibility modes when setting David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 37/67] qtest: add netfilter tests for ppc64 David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 38/67] qtest: add display-vga-test to ppc64 David Gibson
2017-01-12 2:02 ` [Qemu-devel] [PULL 39/67] libqos: fix spapr qpci_map() David Gibson
2017-01-12 2:03 ` [Qemu-devel] [PULL 40/67] qtest: convert ivshmem-test to use libqos David Gibson
2017-01-12 2:03 ` [Qemu-devel] [PULL 41/67] qtest: add ivshmem-test for ppc64 David Gibson
2017-01-12 2:03 ` [Qemu-devel] [PULL 42/67] hw/gpio: QOM'ify mpc8xxx.c David Gibson
2017-01-12 2:03 ` [Qemu-devel] [PULL 43/67] hw/ppc: QOM'ify e500.c David Gibson
2017-01-12 2:03 ` [Qemu-devel] [PULL 44/67] hw/ppc: QOM'ify ppce500_spin.c David Gibson
2017-01-12 2:03 ` [Qemu-devel] [PULL 45/67] hw/ppc: QOM'ify spapr_vio.c David Gibson
2017-01-12 2:03 ` [Qemu-devel] [PULL 46/67] target-ppc: Add xxextractuw instruction David Gibson
2017-01-12 2:03 ` [Qemu-devel] [PULL 47/67] target-ppc: Add xxinsertw instruction David Gibson
2017-01-12 2:03 ` [Qemu-devel] [PULL 48/67] prep: add PReP System I/O David Gibson
2017-01-12 2:03 ` [Qemu-devel] [PULL 49/67] prep: add IBM RS/6000 7020 (40p) memory controller David Gibson
2017-01-12 2:03 ` [Qemu-devel] [PULL 50/67] prep: add IBM RS/6000 7020 (40p) machine emulation David Gibson
2017-01-12 2:03 ` [Qemu-devel] [PULL 51/67] target-ppc: Use float64 arg in helper_compute_fprf() David Gibson
2017-01-12 2:03 ` [Qemu-devel] [PULL 52/67] target-ppc: Replace isden by float64_is_zero_or_denormal David Gibson
2017-01-12 2:03 ` David Gibson [this message]
2017-01-12 2:03 ` [Qemu-devel] [PULL 54/67] target-ppc: Add xscvdphp, xscvhpdp David Gibson
2017-01-12 2:03 ` [Qemu-devel] [PULL 55/67] target-ppc: Use correct precision for FPRF setting David Gibson
2017-01-12 2:03 ` [Qemu-devel] [PULL 56/67] target-ppc: Add xsxexpdp instruction David Gibson
2017-01-12 2:03 ` [Qemu-devel] [PULL 57/67] target-ppc: Add xsxexpqp instruction David Gibson
2017-01-12 2:03 ` [Qemu-devel] [PULL 58/67] target-ppc: Add xsxsigdp instruction David Gibson
2017-01-12 2:03 ` [Qemu-devel] [PULL 59/67] target-ppc: Add xsxsigqp instructions David Gibson
2017-01-12 2:03 ` [Qemu-devel] [PULL 60/67] pxb: Restrict to x86 David Gibson
2017-01-12 2:03 ` [Qemu-devel] [PULL 61/67] pseries: Rewrite CAS PVR compatibility logic David Gibson
2017-01-12 2:03 ` [Qemu-devel] [PULL 62/67] ppc: Add ppc_set_compat_all() David Gibson
2017-01-12 2:03 ` [Qemu-devel] [PULL 63/67] target-ppc: Add xsaddqp instructions David Gibson
2017-01-12 2:03 ` [Qemu-devel] [PULL 64/67] target-ppc: Add xscvdpqp instruction David Gibson
2017-01-12 2:03 ` [Qemu-devel] [PULL 65/67] target-ppc: Add xscvqpdp instruction David Gibson
2017-01-12 2:03 ` [Qemu-devel] [PULL 66/67] ppc: Prevent inifnite loop in decrementer auto-reload David Gibson
2017-01-12 2:03 ` [Qemu-devel] [PULL 67/67] ppc: Fix a warning in bcdcfz code and improve BCD_DIG_BYTE macro David Gibson
2017-01-12 3:42 ` [Qemu-devel] [PULL 00/67] ppc-for-2.9 queue 20170112 no-reply
2017-01-12 23:36 ` David Gibson
2017-01-13 10:54 ` Peter Maydell
2017-01-13 11:09 ` Laurent Vivier
2017-01-16 21:33 ` David Gibson
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for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).