[Qemu-devel] [PULL 00/24] target/openrisc patches

[Richard Henderson <rth@twiddle.net>]

This is the v2 patch set that I posted last week.
It even acquired some new R-b.  Whee!


r~



The following changes since commit 305e6c8a2ff7a6e3f4942b50e853230f18eeb5a9:

  Merge remote-tracking branch 'remotes/stefanha/tags/tracing-pull-request' into staging (2017-02-13 16:44:04 +0000)

are available in the git repository at:

  git://github.com/rth7680/qemu.git tags/pull-or-20170214

for you to fetch changes up to 6597c28d618a3d16d468770b7c30a0237a8c8ea9:

  target/openrisc: Optimize for r0 being zero (2017-02-14 08:15:00 +1100)

----------------------------------------------------------------
Queued openrisc patches

----------------------------------------------------------------
Richard Henderson (23):
      target/openrisc: Rename the cpu from or32 to or1k
      linux-user: Add MMAP_SHIFT for openrisc
      linux-user: Fix openrisc cpu_loop
      linux-user: Honor CLONE_SETTLS for openrisc
      target/openrisc: Implement lwa, swa
      target/openrisc: Tidy insn dumping
      target/openrisc: Rationalize immediate extraction
      target/openrisc: Streamline arithmetic and OVE
      target/openrisc: Put SR[OVE] in TB flags
      target/openrisc: Invert the decoding in dec_calc
      target/openrisc: Keep SR_F in a separate variable
      target/openrisc: Keep SR_CY and SR_OV in a separate variables
      target/openrisc: Use movcond where appropriate
      target/openrisc: Set flags on helpers
      target/openrisc: Enable trap, csync, msync, psync for user mode
      target/openrisc: Implement msync
      target/openrisc: Represent MACHI:MACLO as a single unit
      target/openrisc: Implement muld, muldu, macu, msbu
      target/openrisc: Fix madd
      target/openrisc: Optimize l.jal to next
      target/openrisc: Tidy ppc/npc implementation
      target/openrisc: Tidy handling of delayed branches
      target/openrisc: Optimize for r0 being zero

Stafford Horne (1):
      target/openrisc: Fix exception handling status registers

 configure                            |    6 +-
 default-configs/or1k-linux-user.mak  |    1 +
 default-configs/or1k-softmmu.mak     |    4 +
 default-configs/or32-linux-user.mak  |    1 -
 default-configs/or32-softmmu.mak     |    4 -
 hw/openrisc/openrisc_sim.c           |    4 +-
 linux-user/elfload.c                 |    3 +-
 linux-user/main.c                    |   98 +--
 linux-user/openrisc/target_cpu.h     |    4 +-
 linux-user/openrisc/target_syscall.h |    2 +
 target/openrisc/Makefile.objs        |    2 +-
 target/openrisc/cpu.c                |    1 +
 target/openrisc/cpu.h                |   50 +-
 target/openrisc/exception_helper.c   |   32 +
 target/openrisc/fpu_helper.c         |   68 +-
 target/openrisc/gdbstub.c            |   17 +-
 target/openrisc/helper.h             |   33 +-
 target/openrisc/int_helper.c         |   61 --
 target/openrisc/interrupt.c          |   14 +-
 target/openrisc/interrupt_helper.c   |    4 +-
 target/openrisc/machine.c            |   62 +-
 target/openrisc/mmu.c                |    1 +
 target/openrisc/sys_helper.c         |   62 +-
 target/openrisc/translate.c          | 1389 ++++++++++++++++------------------
 tests/tcg/openrisc/Makefile          |    4 +-
 25 files changed, 915 insertions(+), 1012 deletions(-)
 create mode 100644 default-configs/or1k-linux-user.mak
 create mode 100644 default-configs/or1k-softmmu.mak
 delete mode 100644 default-configs/or32-linux-user.mak
 delete mode 100644 default-configs/or32-softmmu.mak
 delete mode 100644 target/openrisc/int_helper.c