From: joserz@linux.vnet.ibm.com
To: Peter Maydell <peter.maydell@linaro.org>
Cc: QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH Risu v2 4/9] Implement lib to deal with PPC64 registers
Date: Wed, 15 Feb 2017 17:28:37 -0200 [thread overview]
Message-ID: <20170215192837.GA19724@pacoca> (raw)
In-Reply-To: <CAFEAcA9SUkpgg-wDON+GtY1nOMohFBadeP7-YqCcsbngzi3GAg@mail.gmail.com>
On Wed, Feb 15, 2017 at 06:50:13PM +0000, Peter Maydell wrote:
> On 6 November 2016 at 17:15, Jose Ricardo Ziviani
> <joserz@linux.vnet.ibm.com> wrote:
> > This library is the initial effort to have PPC64 support for Risu. It
> > implements functions to initialize, compare and print PPC64 registers.
> >
> > Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
>
> Hi; I've been looking at refactoring risu to reduce the huge
> code duplication between the CPU backends, and I noticed this
> weirdness in the PPC code:
>
>
> > +/* reginfo_is_eq: compare the reginfo structs, returns nonzero if equal */
> > +int reginfo_is_eq(struct reginfo *m, struct reginfo *a, ucontext_t *uc)
> > +{
>
> > + for (i = 0; i < 32; i++) {
> > + if (m->vrregs.vrregs[i][0] != a->vrregs.vrregs[i][0] ||
> > + m->vrregs.vrregs[i][1] != a->vrregs.vrregs[i][1] ||
> > + m->vrregs.vrregs[i][2] != a->vrregs.vrregs[i][2] ||
> > + m->vrregs.vrregs[i][3] != a->vrregs.vrregs[i][3]) {
> > +
> > + if (uc != NULL && (m->gregs[CCR] & 0x10)) {
> > + uc->uc_mcontext.v_regs->vrregs[i][0] = a->vrregs.vrregs[i][0];
> > + uc->uc_mcontext.v_regs->vrregs[i][1] = a->vrregs.vrregs[i][1];
> > + uc->uc_mcontext.v_regs->vrregs[i][2] = a->vrregs.vrregs[i][2];
> > + uc->uc_mcontext.v_regs->vrregs[i][3] = a->vrregs.vrregs[i][3];
> > + return 1;
> > + }
>
> What is this intended to be doing? reginfo_is_eq() should be
> a simple "compare two structures" operation, but here we
> take a ucontext_t* (which is something completely different)
> and modify it. We don't even necessarily have a ucontext_t
> to hand when we're trying to compare reginfo structs...
hmmm, good question, it's certainly something I've done for testing but forgot to remove. I'll send a patch removing it.
Thanks!
>
> thanks
> -- PMM
>
next prev parent reply other threads:[~2017-02-15 19:29 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-06 17:15 [Qemu-devel] [PATCH Risu v2 0/9] Risu support for PPC64LE Jose Ricardo Ziviani
2016-11-06 17:15 ` [Qemu-devel] [PATCH Risu v2 1/9] Create risugen_arm.pm module for risugen Jose Ricardo Ziviani
2016-11-06 17:15 ` [Qemu-devel] [PATCH Risu v2 2/9] Refactor risugen to remove ARM specific code Jose Ricardo Ziviani
2016-11-06 17:15 ` [Qemu-devel] [PATCH Risu v2 3/9] Change mode directive of ARM risu files Jose Ricardo Ziviani
2016-11-06 17:15 ` [Qemu-devel] [PATCH Risu v2 4/9] Implement lib to deal with PPC64 registers Jose Ricardo Ziviani
2017-02-15 18:50 ` Peter Maydell
2017-02-15 19:28 ` joserz [this message]
2016-11-06 17:15 ` [Qemu-devel] [PATCH Risu v2 5/9] Implement basic test code for PPC64 Jose Ricardo Ziviani
2016-11-06 17:15 ` [Qemu-devel] [PATCH Risu v2 6/9] Implement initial support " Jose Ricardo Ziviani
2016-11-06 17:15 ` [Qemu-devel] [PATCH Risu v2 7/9] Add PPC64 in risu build system Jose Ricardo Ziviani
2017-02-18 22:41 ` Peter Maydell
2017-02-21 2:24 ` joserz
2017-02-21 9:59 ` Peter Maydell
2016-11-06 17:15 ` [Qemu-devel] [PATCH Risu v2 8/9] Implement risugen module for PPC64 Jose Ricardo Ziviani
2016-11-06 17:15 ` [Qemu-devel] [PATCH Risu v2 9/9] Implement risufile with all PPC64 instructions Jose Ricardo Ziviani
2016-11-07 16:43 ` [Qemu-devel] [PATCH Risu v2 0/9] Risu support for PPC64LE Peter Maydell
2016-11-07 20:18 ` joserz
2016-11-07 20:44 ` Peter Maydell
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