From: "Alex Bennée" <alex.bennee@linaro.org>
To: rth@twiddle.net
Cc: peter.maydell@linaro.org, qemu-devel@nongnu.org,
mttcg@listserver.greensocs.com, fred.konrad@greensocs.com,
a.rigo@virtualopensystems.com, cota@braap.org,
bobby.prani@gmail.com, nikunj@linux.vnet.ibm.com,
"Alex Bennée" <alex.bennee@linaro.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Eduardo Habkost" <ehabkost@redhat.com>
Subject: [Qemu-devel] [PATCH v1 2/3] target/i386/cpu.h: declare TCG_GUEST_DEFAULT_MO
Date: Tue, 28 Feb 2017 15:07:08 +0000 [thread overview]
Message-ID: <20170228150709.27453-3-alex.bennee@linaro.org> (raw)
In-Reply-To: <20170228150709.27453-1-alex.bennee@linaro.org>
This suppresses the incorrect warning when forcing MTTCG for x86
guests on x86 hosts. A future patch will still warn when
TARGET_SUPPORT_MTTCG hasn't been defined for the guest (which is still
pending for x86).
Reported-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
target/i386/cpu.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 573f2aa988..6be19d7e74 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -30,6 +30,9 @@
#define TARGET_LONG_BITS 32
#endif
+/* The x86 has a strong memory model with some store-after-load re-ordering */
+#define TCG_GUEST_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD)
+
/* Maximum instruction code size */
#define TARGET_MAX_INSN_SIZE 16
--
2.11.0
next prev parent reply other threads:[~2017-02-28 15:07 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-28 15:07 [Qemu-devel] [PATCH v1 0/3] MTTCG start-up tweaks Alex Bennée
2017-02-28 15:07 ` [Qemu-devel] [PATCH v1 1/3] vl/cpus: be smarter with icount and MTTCG Alex Bennée
2017-02-28 15:07 ` Alex Bennée [this message]
2017-02-28 15:07 ` [Qemu-devel] [PATCH v1 3/3] cpus.c: add additional error_report when !TARGET_SUPPORT_MTTCG Alex Bennée
2017-02-28 18:11 ` [Qemu-devel] [PATCH v1 0/3] MTTCG start-up tweaks Richard Henderson
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