From: David Gibson <david@gibson.dropbear.id.au>
To: peter.maydell@linaro.org
Cc: agraf@suse.de, qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
mdroth@linux.vnet.ibm.com, aik@ozlabs.ru, thuth@redhat.com,
lvivier@redhat.com, David Gibson <david@gibson.dropbear.id.au>
Subject: [Qemu-devel] [PULL 03/50] PCI: add missing classes in pci_ids.h to build device tree
Date: Wed, 1 Mar 2017 15:43:18 +1100 [thread overview]
Message-ID: <20170301044405.1792-4-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <20170301044405.1792-1-david@gibson.dropbear.id.au>
From: Laurent Vivier <lvivier@redhat.com>
To allow QEMU to add PCI entries in device tree,
we must have a more exhaustive list of PCI class IDs.
This patch synchronizes as much as possible with
pci_ids.h and add some missing IDs from SLOF.
Signed-off-by: Laurent Vivier <lvivier@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
include/hw/pci/pci_ids.h | 112 +++++++++++++++++++++++++++++++++++++++++++----
1 file changed, 103 insertions(+), 9 deletions(-)
diff --git a/include/hw/pci/pci_ids.h b/include/hw/pci/pci_ids.h
index d77ca60..d22ad8d 100644
--- a/include/hw/pci/pci_ids.h
+++ b/include/hw/pci/pci_ids.h
@@ -13,41 +13,84 @@
/* Device classes and subclasses */
-#define PCI_BASE_CLASS_STORAGE 0x01
-#define PCI_BASE_CLASS_NETWORK 0x02
+#define PCI_CLASS_NOT_DEFINED 0x0000
+#define PCI_CLASS_NOT_DEFINED_VGA 0x0001
+#define PCI_BASE_CLASS_STORAGE 0x01
#define PCI_CLASS_STORAGE_SCSI 0x0100
#define PCI_CLASS_STORAGE_IDE 0x0101
+#define PCI_CLASS_STORAGE_FLOPPY 0x0102
+#define PCI_CLASS_STORAGE_IPI 0x0103
#define PCI_CLASS_STORAGE_RAID 0x0104
+#define PCI_CLASS_STORAGE_ATA 0x0105
#define PCI_CLASS_STORAGE_SATA 0x0106
+#define PCI_CLASS_STORAGE_SAS 0x0107
#define PCI_CLASS_STORAGE_EXPRESS 0x0108
#define PCI_CLASS_STORAGE_OTHER 0x0180
+#define PCI_BASE_CLASS_NETWORK 0x02
#define PCI_CLASS_NETWORK_ETHERNET 0x0200
+#define PCI_CLASS_NETWORK_TOKEN_RING 0x0201
+#define PCI_CLASS_NETWORK_FDDI 0x0202
+#define PCI_CLASS_NETWORK_ATM 0x0203
+#define PCI_CLASS_NETWORK_ISDN 0x0204
+#define PCI_CLASS_NETWORK_WORLDFIP 0x0205
+#define PCI_CLASS_NETWORK_PICMG214 0x0206
#define PCI_CLASS_NETWORK_OTHER 0x0280
+#define PCI_BASE_CLASS_DISPLAY 0x03
#define PCI_CLASS_DISPLAY_VGA 0x0300
+#define PCI_CLASS_DISPLAY_XGA 0x0301
+#define PCI_CLASS_DISPLAY_3D 0x0302
#define PCI_CLASS_DISPLAY_OTHER 0x0380
+#define PCI_BASE_CLASS_MULTIMEDIA 0x04
+#define PCI_CLASS_MULTIMEDIA_VIDEO 0x0400
#define PCI_CLASS_MULTIMEDIA_AUDIO 0x0401
+#define PCI_CLASS_MULTIMEDIA_PHONE 0x0402
+#define PCI_CLASS_MULTIMEDIA_OTHER 0x0480
+#define PCI_BASE_CLASS_MEMORY 0x05
#define PCI_CLASS_MEMORY_RAM 0x0500
+#define PCI_CLASS_MEMORY_FLASH 0x0501
+#define PCI_CLASS_MEMORY_OTHER 0x0580
-#define PCI_CLASS_SYSTEM_SDHCI 0x0805
-#define PCI_CLASS_SYSTEM_OTHER 0x0880
-
-#define PCI_CLASS_SERIAL_USB 0x0c03
-#define PCI_CLASS_SERIAL_SMBUS 0x0c05
-
+#define PCI_BASE_CLASS_BRIDGE 0x06
#define PCI_CLASS_BRIDGE_HOST 0x0600
#define PCI_CLASS_BRIDGE_ISA 0x0601
+#define PCI_CLASS_BRIDGE_EISA 0x0602
+#define PCI_CLASS_BRIDGE_MC 0x0603
#define PCI_CLASS_BRIDGE_PCI 0x0604
#define PCI_CLASS_BRIDGE_PCI_INF_SUB 0x01
+#define PCI_CLASS_BRIDGE_PCMCIA 0x0605
+#define PCI_CLASS_BRIDGE_NUBUS 0x0606
+#define PCI_CLASS_BRIDGE_CARDBUS 0x0607
+#define PCI_CLASS_BRIDGE_RACEWAY 0x0608
+#define PCI_CLASS_BRIDGE_PCI_SEMITP 0x0609
+#define PCI_CLASS_BRIDGE_IB_PCI 0x060a
#define PCI_CLASS_BRIDGE_OTHER 0x0680
+#define PCI_BASE_CLASS_COMMUNICATION 0x07
#define PCI_CLASS_COMMUNICATION_SERIAL 0x0700
+#define PCI_CLASS_COMMUNICATION_PARALLEL 0x0701
+#define PCI_CLASS_COMMUNICATION_MULTISERIAL 0x0702
+#define PCI_CLASS_COMMUNICATION_MODEM 0x0703
+#define PCI_CLASS_COMMUNICATION_GPIB 0x0704
+#define PCI_CLASS_COMMUNICATION_SC 0x0705
#define PCI_CLASS_COMMUNICATION_OTHER 0x0780
+#define PCI_BASE_CLASS_SYSTEM 0x08
+#define PCI_CLASS_SYSTEM_PIC 0x0800
+#define PCI_CLASS_SYSTEM_PIC_IOAPIC 0x080010
+#define PCI_CLASS_SYSTEM_PIC_IOXAPIC 0x080020
+#define PCI_CLASS_SYSTEM_DMA 0x0801
+#define PCI_CLASS_SYSTEM_TIMER 0x0802
+#define PCI_CLASS_SYSTEM_RTC 0x0803
+#define PCI_CLASS_SYSTEM_PCI_HOTPLUG 0x0804
+#define PCI_CLASS_SYSTEM_SDHCI 0x0805
+#define PCI_CLASS_SYSTEM_OTHER 0x0880
+
+#define PCI_BASE_CLASS_INPUT 0x09
#define PCI_CLASS_INPUT_KEYBOARD 0x0900
#define PCI_CLASS_INPUT_PEN 0x0901
#define PCI_CLASS_INPUT_MOUSE 0x0902
@@ -55,8 +98,59 @@
#define PCI_CLASS_INPUT_GAMEPORT 0x0904
#define PCI_CLASS_INPUT_OTHER 0x0980
-#define PCI_CLASS_PROCESSOR_CO 0x0b40
+#define PCI_BASE_CLASS_DOCKING 0x0a
+#define PCI_CLASS_DOCKING_GENERIC 0x0a00
+#define PCI_CLASS_DOCKING_OTHER 0x0a80
+
+#define PCI_BASE_CLASS_PROCESSOR 0x0b
+#define PCI_CLASS_PROCESSOR_PENTIUM 0x0b02
#define PCI_CLASS_PROCESSOR_POWERPC 0x0b20
+#define PCI_CLASS_PROCESSOR_MIPS 0x0b30
+#define PCI_CLASS_PROCESSOR_CO 0x0b40
+
+#define PCI_BASE_CLASS_SERIAL 0x0c
+#define PCI_CLASS_SERIAL_FIREWIRE 0x0c00
+#define PCI_CLASS_SERIAL_ACCESS 0x0c01
+#define PCI_CLASS_SERIAL_SSA 0x0c02
+#define PCI_CLASS_SERIAL_USB 0x0c03
+#define PCI_CLASS_SERIAL_USB_UHCI 0x0c0300
+#define PCI_CLASS_SERIAL_USB_OHCI 0x0c0310
+#define PCI_CLASS_SERIAL_USB_EHCI 0x0c0320
+#define PCI_CLASS_SERIAL_USB_XHCI 0x0c0330
+#define PCI_CLASS_SERIAL_USB_UNKNOWN 0x0c0380
+#define PCI_CLASS_SERIAL_USB_DEVICE 0x0c03fe
+#define PCI_CLASS_SERIAL_FIBER 0x0c04
+#define PCI_CLASS_SERIAL_SMBUS 0x0c05
+#define PCI_CLASS_SERIAL_IB 0x0c06
+#define PCI_CLASS_SERIAL_IPMI 0x0c07
+#define PCI_CLASS_SERIAL_SERCOS 0x0c08
+#define PCI_CLASS_SERIAL_CANBUS 0x0c09
+
+#define PCI_BASE_CLASS_WIRELESS 0x0d
+#define PCI_CLASS_WIRELESS_IRDA 0x0d00
+#define PCI_CLASS_WIRELESS_CIR 0x0d01
+#define PCI_CLASS_WIRELESS_RF_CONTROLLER 0x0d10
+#define PCI_CLASS_WIRELESS_BLUETOOTH 0x0d11
+#define PCI_CLASS_WIRELESS_BROADBAND 0x0d12
+#define PCI_CLASS_WIRELESS_OTHER 0x0d80
+
+#define PCI_BASE_CLASS_SATELLITE 0x0f
+#define PCI_CLASS_SATELLITE_TV 0x0f00
+#define PCI_CLASS_SATELLITE_AUDIO 0x0f01
+#define PCI_CLASS_SATELLITE_VOICE 0x0f03
+#define PCI_CLASS_SATELLITE_DATA 0x0f04
+
+#define PCI_BASE_CLASS_CRYPT 0x10
+#define PCI_CLASS_CRYPT_NETWORK 0x1000
+#define PCI_CLASS_CRYPT_ENTERTAINMENT 0x1001
+#define PCI_CLASS_CRYPT_OTHER 0x1080
+
+#define PCI_BASE_CLASS_SIGNAL_PROCESSING 0x11
+#define PCI_CLASS_SP_DPIO 0x1100
+#define PCI_CLASS_SP_PERF 0x1101
+#define PCI_CLASS_SP_SYNCH 0x1110
+#define PCI_CLASS_SP_MANAGEMENT 0x1120
+#define PCI_CLASS_SP_OTHER 0x1180
#define PCI_CLASS_OTHERS 0xff
--
2.9.3
next prev parent reply other threads:[~2017-03-01 4:44 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-01 4:43 [Qemu-devel] [PULL 00/50] ppc-for-2.9 queue 20170301 David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 01/50] target/ppc: move cpu_[read, write]_xer to cpu.c David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 02/50] target/ppc: optimize gen_write_xer() David Gibson
2017-03-01 4:43 ` David Gibson [this message]
2017-03-01 4:43 ` [Qemu-devel] [PULL 04/50] spapr: generate DT node names David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 05/50] target/ppc: introduce helper_update_ov_legacy David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 06/50] sysemu: support up to 1024 vCPUs David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 07/50] target/ppc: Fix KVM-HV HPTE accessors David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 08/50] pseries: Minor cleanups to HPT management hypercalls David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 09/50] target/ppc: Merge cpu_ppc_set_vhyp() with cpu_ppc_set_papr() David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 10/50] target/ppc: SDR1 is a hypervisor resource David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 11/50] target/ppc: Cleanup HPTE accessors for 64-bit hash MMU David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 12/50] target/ppc: Eliminate htab_base and htab_mask variables David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 13/50] target/ppc: Manage external HPT via virtual hypervisor David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 14/50] target/ppc: Remove the function ppc_hash64_set_sdr1() David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 15/50] target/ppc: Correct SDR1 masking David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 16/50] target/ppc: support for 32-bit carry and overflow David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 17/50] target/ppc: update ca32 in arithmetic add David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 18/50] target/ppc: update ca32 in arithmetic substract David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 19/50] target/ppc: update overflow flags for add/sub David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 20/50] target/ppc: use tcg ops for neg instruction David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 21/50] target/ppc: add ov32 flag for multiply low insns David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 22/50] target/ppc: add ov32 flag in divide operations David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 23/50] target/ppc: add mcrxrx instruction David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 24/50] spapr/pci: populate PCI DT in reverse order David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 25/50] xics: XICS should not be a SysBusDevice David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 26/50] ppc/xics: remove set_nr_irqs() handler from XICSStateClass David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 27/50] ppc/xics: remove set_nr_servers() " David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 28/50] ppc/xics: store the ICS object under the sPAPR machine David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 29/50] ppc/xics: add an InterruptStatsProvider interface to ICS and ICP objects David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 30/50] ppc/xics: introduce a XICSFabric QOM interface to handle ICSs David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 31/50] ppc/xics: use the QOM interface under the sPAPR machine David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 32/50] ppc/xics: use the QOM interface to get irqs David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 33/50] ppc/xics: use the QOM interface to resend irqs David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 34/50] ppc/xics: remove xics_find_source() David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 35/50] ppc/xics: register the reset handler of ICS objects David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 36/50] ppc/xics: remove the XICS list of ICS David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 37/50] ppc/xics: extend the QOM interface to handle ICPs David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 38/50] ppc/xics: move kernel_xics_fd out of KVMXICSState David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 39/50] ppc/xics: simplify the cpu_setup() handler David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 40/50] ppc/xics: move the cpu_setup() handler under the ICPState class David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 41/50] ppc/xics: use the QOM interface to grab an ICP David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 42/50] ppc/xics: simplify spapr_dt_xics() interface David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 43/50] ppc/xics: register the reset handler of ICP objects David Gibson
2017-03-01 4:43 ` [Qemu-devel] [PULL 44/50] ppc/xics: move the ICP array under the sPAPR machine David Gibson
2017-03-01 4:44 ` [Qemu-devel] [PULL 45/50] ppc/xics: export the XICS init routines David Gibson
2017-03-01 4:44 ` [Qemu-devel] [PULL 46/50] ppc/xics: remove the XICSState classes David Gibson
2017-03-01 4:44 ` [Qemu-devel] [PULL 47/50] ppc/xics: move ics-simple post_load under the machine David Gibson
2017-03-01 4:44 ` [Qemu-devel] [PULL 48/50] ppc/xics: move InterruptStatsProvider to the sPAPR machine David Gibson
2017-03-01 4:44 ` [Qemu-devel] [PULL 49/50] ppc/xics: rename 'ICPState *' variables to 'icp' David Gibson
2017-03-01 4:44 ` [Qemu-devel] [PULL 50/50] Add PowerPC 32-bit guest memory dump support David Gibson
2017-03-02 15:03 ` [Qemu-devel] [PULL 00/50] ppc-for-2.9 queue 20170301 Peter Maydell
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