From: David Gibson <david@gibson.dropbear.id.au>
To: Thomas Huth <thuth@redhat.com>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
Alexander Graf <agraf@suse.de>
Subject: Re: [Qemu-devel] [PATCH] target/ppc: Fix wrong number of UAMR register
Date: Thu, 9 Mar 2017 12:34:14 +1100 [thread overview]
Message-ID: <20170309013414.GL19967@umbus.fritz.box> (raw)
In-Reply-To: <1489003123-3641-1-git-send-email-thuth@redhat.com>
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On Wed, Mar 08, 2017 at 08:58:43PM +0100, Thomas Huth wrote:
> The SPR UAMR has the number 13, and not 12. (Fortunately it seems like
> Linux is not using this register yet - only the privileged version with
> number 29 ... that's why nobody noticed this problem yet)
>
> Signed-off-by: Thomas Huth <thuth@redhat.com>
> ---
> target/ppc/cpu.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Applied to ppc-for-2.9, thanks.
>
> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> index 7c4a1f5..5ee33b3 100644
> --- a/target/ppc/cpu.h
> +++ b/target/ppc/cpu.h
> @@ -1408,7 +1408,7 @@ int ppc_compat_max_threads(PowerPCCPU *cpu);
> #define SPR_601_UDECR (0x006)
> #define SPR_LR (0x008)
> #define SPR_CTR (0x009)
> -#define SPR_UAMR (0x00C)
> +#define SPR_UAMR (0x00D)
> #define SPR_DSCR (0x011)
> #define SPR_DSISR (0x012)
> #define SPR_DAR (0x013) /* DAE for PowerPC 601 */
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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prev parent reply other threads:[~2017-03-09 3:00 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-08 19:58 [Qemu-devel] [PATCH] target/ppc: Fix wrong number of UAMR register Thomas Huth
2017-03-09 1:34 ` David Gibson [this message]
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