From: Stefan Hajnoczi <stefanha@gmail.com>
To: Haozhong Zhang <haozhong.zhang@intel.com>
Cc: qemu-devel@nongnu.org,
Xiao Guangrong <xiaoguangrong.eric@gmail.com>,
"Michael S. Tsirkin" <mst@redhat.com>,
Eduardo Habkost <ehabkost@redhat.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Igor Mammedov <imammedo@redhat.com>,
dan.j.williams@intel.com, Richard Henderson <rth@twiddle.net>
Subject: Re: [Qemu-devel] [RFC PATCH 4/4] nvdimm acpi: build flush hint address structure if required
Date: Thu, 6 Apr 2017 11:13:56 +0100 [thread overview]
Message-ID: <20170406101356.GC21261@stefanha-x1.localdomain> (raw)
In-Reply-To: <20170331084147.32716-5-haozhong.zhang@intel.com>
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On Fri, Mar 31, 2017 at 04:41:47PM +0800, Haozhong Zhang wrote:
>
> Add an boolean option 'flush-hint' to device 'nvdimm'. If it's on, a
> flush hint address structure will be constructed for each nvdimm
> device.
Users should not need to set the flush hint option. NVDIMM
configurations that persist data properly without Flush Hint Addresses
shouldn't use them (for best performance). Configurations that rely on
flush hints *must* use them to guarantee data integrity.
I don't remember if there's a way to detect the configuration from host
userspace, but we should focus on setting this correctly without
requiring users to know which setting is necessary.
> Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com>
> ---
> hw/acpi/nvdimm.c | 106 +++++++++++++++++++++++++++++++++++++++++++++---
> hw/i386/pc.c | 5 ++-
> hw/mem/nvdimm.c | 26 ++++++++++++
> include/hw/mem/nvdimm.h | 2 +-
> 4 files changed, 132 insertions(+), 7 deletions(-)
>
> diff --git a/hw/acpi/nvdimm.c b/hw/acpi/nvdimm.c
> index ea2ac3e..a7ff0b2 100644
> --- a/hw/acpi/nvdimm.c
> +++ b/hw/acpi/nvdimm.c
> @@ -32,6 +32,8 @@
> #include "hw/acpi/bios-linker-loader.h"
> #include "hw/nvram/fw_cfg.h"
> #include "hw/mem/nvdimm.h"
> +#include "exec/address-spaces.h"
> +#include "qapi/error.h"
>
> static int nvdimm_device_list(Object *obj, void *opaque)
> {
> @@ -168,6 +170,22 @@ struct NvdimmNfitControlRegion {
> typedef struct NvdimmNfitControlRegion NvdimmNfitControlRegion;
>
> /*
> + * NVDIMM Flush Hint Address Structure
> + *
> + * It enables the data durability mechanism via ACPI.
> + */
> +struct NvdimmNfitFlushHintAddress {
> + uint16_t type;
> + uint16_t length;
> + uint32_t nfit_handle;
> + uint16_t nr_flush_hint_addr;
> + uint8_t reserved[6];
> +#define NR_FLUSH_HINT_ADDR 1
> + uint64_t flush_hint_addr[NR_FLUSH_HINT_ADDR];
How should the number of flush hints be set? This patch hardcodes it to
1 but the Linux nvdimm drivers tries to balance between flush hint
addresses to improve performance (to prevent cache line bouncing?).
> +} QEMU_PACKED;
> +typedef struct NvdimmNfitFlushHintAddress NvdimmNfitFlushHintAddress;
> +
> +/*
> * Module serial number is a unique number for each device. We use the
> * slot id of NVDIMM device to generate this number so that each device
> * associates with a different number.
> @@ -343,10 +361,79 @@ static void nvdimm_build_structure_dcr(GArray *structures, DeviceState *dev)
> (DSM) in DSM Spec Rev1.*/);
> }
>
> -static GArray *nvdimm_build_device_structure(void)
> +static uint64_t nvdimm_flush_hint_read(void *opaque, hwaddr addr, unsigned size)
> +{
> + return 0;
> +}
> +
> +static void nvdimm_flush_hint_write(void *opaque, hwaddr addr,
> + uint64_t data, unsigned size)
> +{
> + nvdimm_debug("Write Flush Hint: offset 0x%"HWADDR_PRIx", data 0x%"PRIx64"\n",
> + addr, data);
> + nvdimm_flush((NVDIMMDevice *)opaque);
C automatically casts void * to any other pointer type. The cast is
unnecessary.
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next prev parent reply other threads:[~2017-04-06 10:14 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-31 8:41 [Qemu-devel] [RFC PATCH 0/4] nvdimm: enable flush hint address structure Haozhong Zhang
2017-03-31 8:41 ` [Qemu-devel] [RFC PATCH 1/4] pc-dimm: add 'reserved-size' to reserve address range after the ending address Haozhong Zhang
2017-04-06 10:24 ` Stefan Hajnoczi
2017-04-06 10:46 ` Haozhong Zhang
2017-04-07 13:46 ` Stefan Hajnoczi
2017-04-11 8:57 ` Haozhong Zhang
2017-04-20 10:54 ` Igor Mammedov
2017-04-06 11:50 ` Xiao Guangrong
2017-03-31 8:41 ` [Qemu-devel] [RFC PATCH 2/4] nvdimm: add functions to initialize and perform flush on back store Haozhong Zhang
2017-04-06 11:52 ` Xiao Guangrong
2017-04-11 8:22 ` Haozhong Zhang
2017-04-11 8:29 ` Haozhong Zhang
2017-04-11 11:55 ` Xiao Guangrong
2017-04-20 13:12 ` Igor Mammedov
2017-03-31 8:41 ` [Qemu-devel] [RFC PATCH 3/4] nvdimm acpi: record the cache line size in AcpiNVDIMMState Haozhong Zhang
2017-03-31 8:41 ` [Qemu-devel] [RFC PATCH 4/4] nvdimm acpi: build flush hint address structure if required Haozhong Zhang
2017-04-06 10:13 ` Stefan Hajnoczi [this message]
2017-04-06 10:53 ` Haozhong Zhang
2017-04-07 14:41 ` Stefan Hajnoczi
2017-04-07 15:51 ` Dan Williams
2017-04-06 10:25 ` Stefan Hajnoczi
2017-04-20 11:22 ` Igor Mammedov
2017-04-06 9:39 ` [Qemu-devel] [RFC PATCH 0/4] nvdimm: enable flush hint address structure Xiao Guangrong
2017-04-06 9:58 ` Haozhong Zhang
2017-04-06 11:46 ` Xiao Guangrong
2017-04-06 9:43 ` Stefan Hajnoczi
2017-04-06 10:31 ` Haozhong Zhang
2017-04-07 14:38 ` Stefan Hajnoczi
2017-04-06 12:02 ` Xiao Guangrong
2017-04-11 8:41 ` Haozhong Zhang
2017-04-11 14:56 ` Dan Williams
2017-04-20 19:49 ` Dan Williams
2017-04-21 13:56 ` Stefan Hajnoczi
2017-04-21 19:14 ` Dan Williams
2017-04-06 14:32 ` Dan Williams
2017-04-07 14:31 ` Stefan Hajnoczi
2017-04-11 6:34 ` Haozhong Zhang
2017-04-18 10:15 ` Stefan Hajnoczi
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