[Qemu-devel] [PATCH 1/1] target/ppc: Fix emulated userspace access to USPRG3

[Sam Bobroff <sam.bobroff@au1.ibm.com>]

On a fully emulated Power8 system, user space is currently unable to
read from USPRG3 (SPR number 0x103) because it receives an illegal
instruction exception.

However the ISA indicates that it should have read access (to the
content of SPR 0x113, similar to some other registers with user space
read-only counterparts).

This patch registers the new SPR for Book 3S processors and has it
provide read-only access to SPR 0x113.

Signed-off-by: Sam Bobroff <sam.bobroff@au1.ibm.com>
---
 target/ppc/translate_init.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c
index c1a901455c..f863875835 100644
--- a/target/ppc/translate_init.c
+++ b/target/ppc/translate_init.c
@@ -8235,6 +8235,14 @@ static void gen_spr_power8_rpr(CPUPPCState *env)
 #endif
 }
 
+static void gen_spr_book3s_usprg3(CPUPPCState *env)
+{
+    spr_register(env, SPR_USPRG3, "USPRG3",
+                 &spr_read_ureg, SPR_NOACCESS,
+                 &spr_read_ureg, SPR_NOACCESS,
+                 0x00000000);
+}
+
 static void init_proc_book3s_common(CPUPPCState *env)
 {
     gen_spr_ne_601(env);
@@ -8243,6 +8251,7 @@ static void init_proc_book3s_common(CPUPPCState *env)
     gen_spr_book3s_pmu_sup(env);
     gen_spr_book3s_pmu_user(env);
     gen_spr_book3s_ctrl(env);
+    gen_spr_book3s_usprg3(env);
 }
 
 static void init_proc_970(CPUPPCState *env)
-- 
2.12.1.382.gc0f9c7058