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From: David Gibson <david@gibson.dropbear.id.au>
To: peter.maydell@linaro.org
Cc: agraf@suse.de, mdroth@linux.vnet.ibm.com, aik@ozlabs.ru,
	qemu-devel@nongnu.org, qemu-ppc@nongnu.org, clg@kaod.org,
	David Gibson <david@gibson.dropbear.id.au>
Subject: [Qemu-devel] [PULL 19/48] spapr: allocate the ICPState object from under sPAPRCPUCore
Date: Wed, 26 Apr 2017 17:00:05 +1000	[thread overview]
Message-ID: <20170426070034.10727-20-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <20170426070034.10727-1-david@gibson.dropbear.id.au>

From: Cédric Le Goater <clg@kaod.org>

Today, all the ICPs are created before the CPUs, stored in an array
under the sPAPR machine and linked to the CPU when the core threads
are realized. This modeling brings some complexity when a lookup in
the array is required and it can be simplified by allocating the ICPs
when the CPUs are.

This is the purpose of this proposal which introduces a new 'icp_type'
field under the machine and creates the ICP objects of the right type
(KVM or not) before the PowerPCCPU object are.

This change allows more cleanups : the removal of the icps array under
the sPAPR machine and the removal of the xics_get_cpu_index_by_dt_id()
helper.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
 hw/intc/xics.c          | 11 -----------
 hw/ppc/spapr.c          | 47 ++++++++++++++---------------------------------
 hw/ppc/spapr_cpu_core.c | 18 ++++++++++++++----
 include/hw/ppc/spapr.h  |  2 +-
 include/hw/ppc/xics.h   |  2 --
 5 files changed, 29 insertions(+), 51 deletions(-)

diff --git a/hw/intc/xics.c b/hw/intc/xics.c
index 56fe70c..d4428b4 100644
--- a/hw/intc/xics.c
+++ b/hw/intc/xics.c
@@ -38,17 +38,6 @@
 #include "monitor/monitor.h"
 #include "hw/intc/intc.h"
 
-int xics_get_cpu_index_by_dt_id(int cpu_dt_id)
-{
-    PowerPCCPU *cpu = ppc_get_vcpu_by_dt_id(cpu_dt_id);
-
-    if (cpu) {
-        return cpu->parent_obj.cpu_index;
-    }
-
-    return -1;
-}
-
 void xics_cpu_destroy(XICSFabric *xi, PowerPCCPU *cpu)
 {
     CPUState *cs = CPU(cpu);
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 08f8615..703b14a 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -104,7 +104,6 @@ static int try_create_xics(sPAPRMachineState *spapr, const char *type_ics,
     XICSFabric *xi = XICS_FABRIC(spapr);
     Error *err = NULL, *local_err = NULL;
     ICSState *ics = NULL;
-    int i;
 
     ics = ICS_SIMPLE(object_new(type_ics));
     object_property_add_child(OBJECT(spapr), "ics", OBJECT(ics), NULL);
@@ -113,34 +112,14 @@ static int try_create_xics(sPAPRMachineState *spapr, const char *type_ics,
     object_property_set_bool(OBJECT(ics), true, "realized", &local_err);
     error_propagate(&err, local_err);
     if (err) {
-        goto error;
+        error_propagate(errp, err);
+        return -1;
     }
 
-    spapr->icps = g_malloc0(nr_servers * sizeof(ICPState));
     spapr->nr_servers = nr_servers;
-
-    for (i = 0; i < nr_servers; i++) {
-        ICPState *icp = &spapr->icps[i];
-
-        object_initialize(icp, sizeof(*icp), type_icp);
-        object_property_add_child(OBJECT(spapr), "icp[*]", OBJECT(icp), NULL);
-        object_property_add_const_link(OBJECT(icp), "xics", OBJECT(xi), NULL);
-        object_property_set_bool(OBJECT(icp), true, "realized", &err);
-        if (err) {
-            goto error;
-        }
-        object_unref(OBJECT(icp));
-    }
-
     spapr->ics = ics;
+    spapr->icp_type = type_icp;
     return 0;
-
-error:
-    error_propagate(errp, err);
-    if (ics) {
-        object_unparent(OBJECT(ics));
-    }
-    return -1;
 }
 
 static int xics_system_init(MachineState *machine,
@@ -1441,9 +1420,10 @@ static int spapr_post_load(void *opaque, int version_id)
     int err = 0;
 
     if (!object_dynamic_cast(OBJECT(spapr->ics), TYPE_ICS_KVM)) {
-        int i;
-        for (i = 0; i < spapr->nr_servers; i++) {
-            icp_resend(&spapr->icps[i]);
+        CPUState *cs;
+        CPU_FOREACH(cs) {
+            PowerPCCPU *cpu = POWERPC_CPU(cs);
+            icp_resend(ICP(cpu->intc));
         }
     }
 
@@ -3114,20 +3094,21 @@ static void spapr_ics_resend(XICSFabric *dev)
 
 static ICPState *spapr_icp_get(XICSFabric *xi, int cpu_dt_id)
 {
-    sPAPRMachineState *spapr = SPAPR_MACHINE(xi);
-    int server = xics_get_cpu_index_by_dt_id(cpu_dt_id);
+    PowerPCCPU *cpu = ppc_get_vcpu_by_dt_id(cpu_dt_id);
 
-    return (server < spapr->nr_servers) ? &spapr->icps[server] : NULL;
+    return cpu ? ICP(cpu->intc) : NULL;
 }
 
 static void spapr_pic_print_info(InterruptStatsProvider *obj,
                                  Monitor *mon)
 {
     sPAPRMachineState *spapr = SPAPR_MACHINE(obj);
-    int i;
+    CPUState *cs;
+
+    CPU_FOREACH(cs) {
+        PowerPCCPU *cpu = POWERPC_CPU(cs);
 
-    for (i = 0; i < spapr->nr_servers; i++) {
-        icp_pic_print_info(&spapr->icps[i], mon);
+        icp_pic_print_info(ICP(cpu->intc), mon);
     }
 
     ics_pic_print_info(spapr->ics, mon);
diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
index 4e1a995..2e689b5 100644
--- a/hw/ppc/spapr_cpu_core.c
+++ b/hw/ppc/spapr_cpu_core.c
@@ -63,8 +63,6 @@ static void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu,
                            Error **errp)
 {
     CPUPPCState *env = &cpu->env;
-    XICSFabric *xi = XICS_FABRIC(spapr);
-    ICPState *icp = xics_icp_get(xi, cpu->cpu_dt_id);
 
     /* Set time-base frequency to 512 MHz */
     cpu_ppc_tb_init(env, SPAPR_TIMEBASE_FREQ);
@@ -82,8 +80,6 @@ static void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu,
         }
     }
 
-    xics_cpu_setup(xi, cpu, icp);
-
     qemu_register_reset(spapr_cpu_reset, cpu);
     spapr_cpu_reset(cpu);
 }
@@ -143,18 +139,32 @@ static void spapr_cpu_core_realize_child(Object *child, Error **errp)
     sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
     CPUState *cs = CPU(child);
     PowerPCCPU *cpu = POWERPC_CPU(cs);
+    Object *obj;
+
+    obj = object_new(spapr->icp_type);
+    object_property_add_child(OBJECT(cpu), "icp", obj, NULL);
+    object_property_add_const_link(obj, "xics", OBJECT(spapr), &error_abort);
+    object_property_set_bool(obj, true, "realized", &local_err);
+    if (local_err) {
+        error_propagate(errp, local_err);
+        return;
+    }
 
     object_property_set_bool(child, true, "realized", &local_err);
     if (local_err) {
+        object_unparent(obj);
         error_propagate(errp, local_err);
         return;
     }
 
     spapr_cpu_init(spapr, cpu, &local_err);
     if (local_err) {
+        object_unparent(obj);
         error_propagate(errp, local_err);
         return;
     }
+
+    xics_cpu_setup(XICS_FABRIC(spapr), cpu, ICP(obj));
 }
 
 static void spapr_cpu_core_realize(DeviceState *dev, Error **errp)
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index e27de64..7dbba57 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -109,7 +109,7 @@ struct sPAPRMachineState {
     MemoryHotplugState hotplug_memory;
 
     uint32_t nr_servers;
-    ICPState *icps;
+    const char *icp_type;
 };
 
 #define H_SUCCESS         0
diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h
index b97d30b..b07f56f 100644
--- a/include/hw/ppc/xics.h
+++ b/include/hw/ppc/xics.h
@@ -172,8 +172,6 @@ void xics_cpu_setup(XICSFabric *xi, PowerPCCPU *cpu, ICPState *icp);
 void xics_cpu_destroy(XICSFabric *xi, PowerPCCPU *cpu);
 
 /* Internal XICS interfaces */
-int xics_get_cpu_index_by_dt_id(int cpu_dt_id);
-
 void icp_set_cppr(ICPState *icp, uint8_t cppr);
 void icp_set_mfrr(ICPState *icp, uint8_t mfrr);
 uint32_t icp_accept(ICPState *ss);
-- 
2.9.3

  parent reply	other threads:[~2017-04-26  7:01 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-26  6:59 [Qemu-devel] [PULL 00/48] ppc-for-2.10 queue 20170426 David Gibson
2017-04-26  6:59 ` [Qemu-devel] [PULL 01/48] target/ppc: Improve accuracy of guest HTM availability on P8s David Gibson
2017-04-26  6:59 ` [Qemu-devel] [PULL 02/48] pseries: Add pseries-2.10 machine type David Gibson
2017-04-26  6:59 ` [Qemu-devel] [PULL 03/48] ppc/spapr: QOM'ify sPAPRRTCState David Gibson
2017-04-26  6:59 ` [Qemu-devel] [PULL 04/48] hw/ppc/pnv: Classify the "PowerNV Chip" devices as CPU devices David Gibson
2017-04-26  6:59 ` [Qemu-devel] [PULL 05/48] target-ppc: kvm: make use of KVM_CREATE_SPAPR_TCE_64 David Gibson
2017-04-26  6:59 ` [Qemu-devel] [PULL 06/48] spapr: Add ibm, processor-radix-AP-encodings to the device tree David Gibson
2017-04-26  6:59 ` [Qemu-devel] [PULL 07/48] target-ppc: support KVM_CAP_PPC_MMU_RADIX, KVM_CAP_PPC_MMU_HASH_V3 David Gibson
2017-04-26  6:59 ` [Qemu-devel] [PULL 08/48] target/ppc: Add new H-CALL shells for in memory table translation David Gibson
2017-04-26  6:59 ` [Qemu-devel] [PULL 09/48] target/ppc: Implement H_REGISTER_PROCESS_TABLE H_CALL David Gibson
2017-04-26  6:59 ` [Qemu-devel] [PULL 10/48] spapr: move spapr_populate_pa_features() David Gibson
2017-04-26  6:59 ` [Qemu-devel] [PULL 11/48] spapr: Enable ISA 3.0 MMU mode selection via CAS David Gibson
2017-04-26  6:59 ` [Qemu-devel] [PULL 12/48] spapr: Workaround for broken radix guests David Gibson
2017-04-26  6:59 ` [Qemu-devel] [PULL 13/48] target-ppc/kvm: Enable in-kernel TCE acceleration for multi-tce David Gibson
2017-04-26  7:00 ` [Qemu-devel] [PULL 14/48] spapr_pci: Warn when RAM page size is not enabled in IOMMU page mask David Gibson
2017-04-26  7:00 ` [Qemu-devel] [PULL 15/48] spapr_pci: Removed unused include David Gibson
2017-04-26  7:00 ` [Qemu-devel] [PULL 16/48] target/ppc: Add ibm, processor-radix-AP-encodings for TCG David Gibson
2017-04-26  7:00 ` [Qemu-devel] [PULL 17/48] ppc/xics: introduce an 'intc' backlink under PowerPCCPU David Gibson
2017-04-26  7:00 ` [Qemu-devel] [PULL 18/48] spapr: move the IRQ server number mapping under the machine David Gibson
2017-04-26  7:00 ` David Gibson [this message]
2017-05-16 12:03   ` [Qemu-devel] [PULL 19/48] spapr: allocate the ICPState object from under sPAPRCPUCore Laurent Vivier
2017-05-16 12:50     ` Cédric Le Goater
2017-05-16 12:55       ` Laurent Vivier
2017-05-16 15:18         ` Cédric Le Goater
2017-05-16 16:10           ` Greg Kurz
2017-05-17  5:50             ` Cédric Le Goater
2017-05-17  6:37               ` David Gibson
2017-05-17 10:10                 ` [Qemu-devel] [Qemu-ppc] " Greg Kurz
2017-05-17 10:08               ` [Qemu-devel] " Greg Kurz
2017-04-26  7:00 ` [Qemu-devel] [PULL 20/48] ppc/xics: add a realize() handler to ICPStateClass David Gibson
2017-04-26  7:00 ` [Qemu-devel] [PULL 21/48] ppc/pnv: add a PnvICPState object David Gibson
2017-04-26  7:00 ` [Qemu-devel] [PULL 22/48] ppc/pnv: extend the machine with a XICSFabric interface David Gibson
2017-04-26  7:00 ` [Qemu-devel] [PULL 23/48] ppc/pnv: extend the machine with a InterruptStatsProvider interface David Gibson
2017-04-26  7:00 ` [Qemu-devel] [PULL 24/48] ppc/pnv: create the ICP object under PnvCore David Gibson
2017-04-26  7:00 ` [Qemu-devel] [PULL 25/48] ppc/pnv: add a helper to calculate MMIO addresses registers David Gibson
2017-04-26  7:00 ` [Qemu-devel] [PULL 26/48] ppc/pnv: add memory regions for the ICP registers David Gibson
2017-04-26  7:00 ` [Qemu-devel] [PULL 27/48] ppc/pnv: Add cut down PSI bridge model and hookup external interrupt David Gibson
2017-04-26  7:00 ` [Qemu-devel] [PULL 28/48] ppc/pnv: Add OCC model stub with interrupt support David Gibson
2017-04-26  7:00 ` [Qemu-devel] [PULL 29/48] ppc: add IPMI support David Gibson
2017-04-26  7:00 ` [Qemu-devel] [PULL 30/48] ipmi: use a file to load SDRs David Gibson
2017-04-26  7:00 ` [Qemu-devel] [PULL 31/48] ipmi: provide support for FRUs David Gibson
2017-04-26  7:00 ` [Qemu-devel] [PULL 32/48] ipmi: introduce an ipmi_bmc_sdr_find() API David Gibson
2017-04-26  7:00 ` [Qemu-devel] [PULL 33/48] ipmi: introduce an ipmi_bmc_gen_event() API David Gibson
2017-04-26  7:00 ` [Qemu-devel] [PULL 34/48] target/ppc: Fix size of struct PPCElfPrstatus David Gibson
2017-04-26  7:00 ` [Qemu-devel] [PULL 35/48] spapr: remove the 'nr_servers' field from the machine David Gibson
2017-04-26  7:00 ` [Qemu-devel] [PULL 36/48] ppc/pnv: Add support for POWER8+ LPC Controller David Gibson
2017-04-26  7:00 ` [Qemu-devel] [PULL 37/48] ppc/pnv: enable only one LPC bus David Gibson
2017-04-26  7:00 ` [Qemu-devel] [PULL 38/48] ppc/pnv: scan ISA bus to populate device tree David Gibson
2017-04-26  7:00 ` [Qemu-devel] [PULL 39/48] ppc/pnv: populate device tree for RTC devices David Gibson
2017-04-26  7:00 ` [Qemu-devel] [PULL 40/48] ppc/pnv: populate device tree for serial devices David Gibson
2017-04-26  7:00 ` [Qemu-devel] [PULL 41/48] ppc/pnv: populate device tree for IPMI BT devices David Gibson
2017-04-26  7:00 ` [Qemu-devel] [PULL 42/48] ppc/pnv: add initial IPMI sensors for the BMC simulator David Gibson
2017-04-26  7:00 ` [Qemu-devel] [PULL 43/48] ppc/pnv: generate an OEM SEL event on shutdown David Gibson
2017-04-26  7:00 ` [Qemu-devel] [PULL 44/48] spapr-cpu-core: Release ICPState object during CPU unrealization David Gibson
2017-04-26  7:00 ` [Qemu-devel] [PULL 45/48] target/ppc: Flush TLB on write to PIDR David Gibson
2017-04-26  7:00 ` [Qemu-devel] [PULL 46/48] e500, book3s: mfspr 259: Register mapped/aliased SPRG3 user read David Gibson
2017-04-26  7:00 ` [Qemu-devel] [PULL 47/48] target/ppc: Style fixes David Gibson
2017-04-26  7:00 ` [Qemu-devel] [PULL 48/48] MAINTAINERS: Remove myself from e500 David Gibson
2017-04-26  9:04 ` [Qemu-devel] [PULL 00/48] ppc-for-2.10 queue 20170426 no-reply
2017-04-26 14:32 ` Peter Maydell

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