From: Sam Bobroff <sam.bobroff@au1.ibm.com>
To: qemu-ppc@nongnu.org
Cc: qemu-devel@nongnu.org, david@gibson.dropbear.id.au
Subject: [Qemu-devel] [PATCH 2/2] ppc/xics: preserve P and Q bits for KVM IRQs
Date: Thu, 27 Apr 2017 16:32:03 +1000 [thread overview]
Message-ID: <20170427063203.GC11487@tungsten.ozlabs.ibm.com> (raw)
In-Reply-To: <cover.1493274659.git.sam.bobroff@au1.ibm.com>
Kernel commit 17d48610ae0f ("KVM: PPC: Book 3S: XICS: Implement ICS
P/Q states") added new bits to the state used by KVM IRQs. Currently,
QEMU does not preserve these bits, so migrating (or otherwise saving
and restoring) the guest state causes the P and Q bits to be cleared.
Clearing the P bit has no effect, because the kernel will set it based
on other data, but the loss of a set Q bit will cause a lost
interrupt.
This patch preserves the P and Q bits, correcting the problem.
Signed-off-by: Sam Bobroff <sam.bobroff@au1.ibm.com>
---
hw/intc/xics_kvm.c | 12 ++++++++++++
include/hw/ppc/xics.h | 2 ++
2 files changed, 14 insertions(+)
diff --git a/hw/intc/xics_kvm.c b/hw/intc/xics_kvm.c
index 03c1fc77cb..dd93531ae3 100644
--- a/hw/intc/xics_kvm.c
+++ b/hw/intc/xics_kvm.c
@@ -229,6 +229,12 @@ static void ics_get_kvm_state(ICSState *ics)
| XICS_STATUS_REJECTED;
}
}
+ if (state & KVM_XICS_PRESENTED) {
+ irq->status |= XICS_STATUS_PRESENTED;
+ }
+ if (state & KVM_XICS_QUEUED) {
+ irq->status |= XICS_STATUS_QUEUED;
+ }
}
}
@@ -266,6 +272,12 @@ static int ics_set_kvm_state(ICSState *ics, int version_id)
state |= KVM_XICS_PENDING;
}
}
+ if (irq->status & XICS_STATUS_PRESENTED) {
+ state |= KVM_XICS_PRESENTED;
+ }
+ if (irq->status & XICS_STATUS_QUEUED) {
+ state |= KVM_XICS_QUEUED;
+ }
ret = ioctl(kernel_xics_fd, KVM_SET_DEVICE_ATTR, &attr);
if (ret != 0) {
diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h
index 9a5e715fe5..36c79eb45c 100644
--- a/include/hw/ppc/xics.h
+++ b/include/hw/ppc/xics.h
@@ -131,6 +131,8 @@ struct ICSIRQState {
#define XICS_STATUS_SENT 0x2
#define XICS_STATUS_REJECTED 0x4
#define XICS_STATUS_MASKED_PENDING 0x8
+#define XICS_STATUS_PRESENTED 0x10
+#define XICS_STATUS_QUEUED 0x20
uint8_t status;
/* (flags & XICS_FLAGS_IRQ_MASK) == 0 means the interrupt is not allocated */
#define XICS_FLAGS_IRQ_LSI 0x1
--
2.12.1.382.gc0f9c7058
next prev parent reply other threads:[~2017-04-27 6:33 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <cover.1493274659.git.sam.bobroff@au1.ibm.com>
2017-04-27 6:31 ` [Qemu-devel] [PATCH 1/2] ppc/xics: Fix stale irq->status bits after get Sam Bobroff
2017-05-01 6:13 ` David Gibson
2017-04-27 6:32 ` Sam Bobroff [this message]
2017-05-01 6:45 ` [Qemu-devel] [PATCH 2/2] ppc/xics: preserve P and Q bits for KVM IRQs David Gibson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20170427063203.GC11487@tungsten.ozlabs.ibm.com \
--to=sam.bobroff@au1.ibm.com \
--cc=david@gibson.dropbear.id.au \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).