From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: cota@braap.org
Subject: [Qemu-devel] [PATCH v6 16/25] tcg/arm: Clarify tcg_out_bx for arm4 host
Date: Tue, 2 May 2017 12:22:51 -0700 [thread overview]
Message-ID: <20170502192300.2124-17-rth@twiddle.net> (raw)
In-Reply-To: <20170502192300.2124-1-rth@twiddle.net>
In theory this would re-enable usage of QEMU on an armv4 host.
Whether this is worthwhile is debatable -- we've been unconditionally
issuing the armv5t BX instruction in the prologue since 2011 without
complaint. Possibly we should simply require an armv6 host.
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
tcg/arm/tcg-target.inc.c | 29 +++++++++++++++--------------
1 file changed, 15 insertions(+), 14 deletions(-)
diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c
index e75a6d4..590c57d 100644
--- a/tcg/arm/tcg-target.inc.c
+++ b/tcg/arm/tcg-target.inc.c
@@ -329,11 +329,6 @@ static const uint8_t tcg_cond_to_arm_cond[] = {
[TCG_COND_GTU] = COND_HI,
};
-static inline void tcg_out_bx(TCGContext *s, int cond, int rn)
-{
- tcg_out32(s, (cond << 28) | 0x012fff10 | rn);
-}
-
static inline void tcg_out_b(TCGContext *s, int cond, int32_t offset)
{
tcg_out32(s, (cond << 28) | 0x0a000000 |
@@ -402,6 +397,18 @@ static inline void tcg_out_mov_reg(TCGContext *s, int cond, int rd, int rm)
}
}
+static inline void tcg_out_bx(TCGContext *s, int cond, TCGReg rn)
+{
+ /* Unless the C portion of QEMU is compiled as thumb, we don't
+ actually need true BX semantics; merely a branch to an address
+ held in a register. */
+ if (use_armv5t_instructions) {
+ tcg_out32(s, (cond << 28) | 0x012fff10 | rn);
+ } else {
+ tcg_out_mov_reg(s, cond, TCG_REG_PC, rn);
+ }
+}
+
static inline void tcg_out_dat_imm(TCGContext *s,
int cond, int opc, int rd, int rn, int im)
{
@@ -977,7 +984,7 @@ static inline void tcg_out_st8(TCGContext *s, int cond,
* with the code buffer limited to 16MB we wouldn't need the long case.
* But we also use it for the tail-call to the qemu_ld/st helpers, which does.
*/
-static inline void tcg_out_goto(TCGContext *s, int cond, tcg_insn_unit *addr)
+static void tcg_out_goto(TCGContext *s, int cond, tcg_insn_unit *addr)
{
intptr_t addri = (intptr_t)addr;
ptrdiff_t disp = tcg_pcrel_diff(s, addr);
@@ -987,15 +994,9 @@ static inline void tcg_out_goto(TCGContext *s, int cond, tcg_insn_unit *addr)
return;
}
+ assert(use_armv5t_instructions || (addri & 1) == 0);
tcg_out_movi32(s, cond, TCG_REG_TMP, addri);
- if (use_armv5t_instructions) {
- tcg_out_bx(s, cond, TCG_REG_TMP);
- } else {
- if (addri & 1) {
- tcg_abort();
- }
- tcg_out_mov_reg(s, cond, TCG_REG_PC, TCG_REG_TMP);
- }
+ tcg_out_bx(s, cond, TCG_REG_TMP);
}
/* The call case is mostly used for helpers - so it's not unreasonable
--
2.9.3
next prev parent reply other threads:[~2017-05-02 19:23 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-02 19:22 [Qemu-devel] [PATCH v6 00/25] tcg cross-tb optimizations Richard Henderson
2017-05-02 19:22 ` [Qemu-devel] [PATCH v6 01/25] target/nios2: Fix 64-bit ilp32 compilation Richard Henderson
2017-05-05 11:51 ` Philippe Mathieu-Daudé
2017-05-02 19:22 ` [Qemu-devel] [PATCH v6 02/25] tcg/sparc: Use the proper compilation flags for 32-bit Richard Henderson
2017-05-02 19:22 ` [Qemu-devel] [PATCH v6 03/25] qemu/atomic: Loosen restrictions for 64-bit ILP32 hosts Richard Henderson
2017-05-02 19:22 ` [Qemu-devel] [PATCH v6 04/25] tcg: Introduce goto_ptr opcode and tcg_gen_lookup_and_goto_ptr Richard Henderson
2017-05-02 19:22 ` [Qemu-devel] [PATCH v6 05/25] tcg/i386: implement goto_ptr Richard Henderson
2017-05-02 19:22 ` [Qemu-devel] [PATCH v6 06/25] target/arm: optimize cross-page direct jumps in softmmu Richard Henderson
2017-05-02 19:22 ` [Qemu-devel] [PATCH v6 07/25] target/arm: optimize indirect branches Richard Henderson
2017-05-02 19:22 ` [Qemu-devel] [PATCH v6 08/25] target/i386: introduce gen_jr helper to generate lookup_and_goto_ptr Richard Henderson
2017-05-02 19:22 ` [Qemu-devel] [PATCH v6 09/25] target/i386: optimize cross-page direct jumps in softmmu Richard Henderson
2017-05-02 19:22 ` [Qemu-devel] [PATCH v6 10/25] target/i386: optimize indirect branches Richard Henderson
2017-05-02 19:22 ` [Qemu-devel] [PATCH v6 11/25] tb-hash: improve tb_jmp_cache hash function in user mode Richard Henderson
2017-05-02 19:22 ` [Qemu-devel] [PATCH v6 12/25] tcg/ppc: Implement goto_ptr Richard Henderson
2017-05-02 19:22 ` [Qemu-devel] [PATCH v6 13/25] tcg/aarch64: " Richard Henderson
2017-05-06 11:52 ` Aurelien Jarno
2017-05-02 19:22 ` [Qemu-devel] [PATCH v6 14/25] tcg/sparc: " Richard Henderson
2017-05-02 19:22 ` [Qemu-devel] [PATCH v6 15/25] tcg/s390: " Richard Henderson
2017-05-06 12:15 ` Aurelien Jarno
2017-05-02 19:22 ` Richard Henderson [this message]
2017-05-02 19:22 ` [Qemu-devel] [PATCH v6 17/25] tcg/arm: " Richard Henderson
2017-05-02 19:22 ` [Qemu-devel] [PATCH v6 18/25] target/s390: Use tcg_gen_lookup_and_goto_ptr Richard Henderson
2017-05-06 12:14 ` Aurelien Jarno
2017-05-02 19:22 ` [Qemu-devel] [PATCH v6 19/25] target/hppa: " Richard Henderson
2017-05-02 19:22 ` [Qemu-devel] [PATCH v6 20/25] target/alpha: " Richard Henderson
2017-05-02 19:22 ` [Qemu-devel] [PATCH v6 21/25] target/aarch64: optimize cross-page direct jumps in softmmu Richard Henderson
2017-05-02 19:22 ` [Qemu-devel] [PATCH v6 22/25] target/aarch64: optimize indirect branches Richard Henderson
2017-05-02 19:22 ` [Qemu-devel] [PATCH v6 23/25] tcg/mips: implement goto_ptr Richard Henderson
2017-05-02 19:22 ` [Qemu-devel] [PATCH v6 24/25] target/mips: optimize cross-page direct jumps in softmmu Richard Henderson
2017-05-02 19:23 ` [Qemu-devel] [PATCH v6 25/25] target/mips: optimize indirect branches Richard Henderson
2017-05-02 20:22 ` [Qemu-devel] [PATCH v6 00/25] tcg cross-tb optimizations no-reply
2017-05-03 3:36 ` Richard Henderson
2017-05-03 15:51 ` Emilio G. Cota
2017-05-03 16:27 ` Richard Henderson
2017-05-03 18:24 ` Emilio G. Cota
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