From: David Gibson <david@gibson.dropbear.id.au>
To: Thomas Huth <thuth@redhat.com>
Cc: lvivier@redhat.com, mdroth@linux.vnet.ibm.com,
bharata@linux.vnet.ibm.com, sjitindarsingh@gmail.com,
sam.bobroff@au1.ibm.com, qemu-ppc@nongnu.org,
qemu-devel@nongnu.org, agraf@suse.de
Subject: Re: [Qemu-devel] [PATCH] target/ppc: Allow workarounds for POWER9 DD1
Date: Tue, 9 May 2017 17:05:58 +1000 [thread overview]
Message-ID: <20170509070558.GO25748@umbus.fritz.box> (raw)
In-Reply-To: <40670f11-21fa-7a8c-db7a-3053d61f082b@redhat.com>
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On Tue, May 09, 2017 at 06:41:23AM +0200, Thomas Huth wrote:
> On 09.05.2017 05:45, David Gibson wrote:
> > POWER9 DD1 silicon has some bugs which mean it a) isn't really compliant
> > with the ISA v3.00 and b) require a number of special workarounds in the
> > kernel.
> >
> > At the moment, qemu isn't aware of DD1. For TCG we don't really want it to
> > be (why bother emulating buggy silicon). But with KVM, the guest does need
> > to be aware of DD1 so it can apply the necessary workarounds.
> >
> > Meanwhile, the feature negotiation between qemu and the guest strongly
> > favours architected compatibility modes to "raw" CPU modes. In combination
> > with the above, this means the guest sees architected POWER9 mode, and
> > doesn't apply the DD1 workarounds. Well, unless it has yet another
> > workaround to partially ignore what qemu tells it.
> >
> > This patch addresses this by disabling support for compatibility modes when
> > using KVM on a POWER9 DD1 host.
>
> I first though: Hey, it should be fixed in the guest kernel instead, but
> thinking about this twice, I think you're right. If the CPU is not fully
> compatible to the ISA, we really should not announce it as "architected
> / compatible POWER9" in QEMU.
> So basically ACK to your patch, I've just got a cosmetic request below...
>
> > Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> > ---
> > target/ppc/kvm.c | 11 +++++++++++
> > 1 file changed, 11 insertions(+)
> >
> > diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
> > index 8574c36..591b5b5 100644
> > --- a/target/ppc/kvm.c
> > +++ b/target/ppc/kvm.c
> > @@ -2380,6 +2380,17 @@ static void kvmppc_host_cpu_class_init(ObjectClass *oc, void *data)
> >
> > #if defined(TARGET_PPC64)
> > pcc->radix_page_info = kvm_get_radix_page_info();
> > +
> > + if ((pcc->pvr & 0xffffff00) == 0x004e0100) {
>
> Could you please add a proper #define for that magic DD1.0 value to
> cpu-models.h, please?
Good point, done.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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prev parent reply other threads:[~2017-05-10 0:54 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-09 3:45 [Qemu-devel] [PATCH] target/ppc: Allow workarounds for POWER9 DD1 David Gibson
2017-05-09 4:41 ` Thomas Huth
2017-05-09 7:05 ` David Gibson [this message]
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