* [Qemu-devel] [PATCH v2] nvme: Implement Write Zeroes
@ 2017-05-05 9:58 Christoph Hellwig
2017-05-09 15:01 ` Kevin Wolf
0 siblings, 1 reply; 4+ messages in thread
From: Christoph Hellwig @ 2017-05-05 9:58 UTC (permalink / raw)
To: keith.busch, kwolf, mreitz; +Cc: qemu-block, qemu-devel
Signed-off-by: Keith Busch <keith.busch@intel.com>
[hch: ported over from qemu-nvme.git to mainline]
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
hw/block/nvme.c | 26 ++++++++++++++++++++++++++
hw/block/nvme.h | 1 +
2 files changed, 27 insertions(+)
Changes since v1:
- add BDRV_REQ_MAY_UNMAP flag
diff --git a/hw/block/nvme.c b/hw/block/nvme.c
index ae303d44e5..7428db9f0c 100644
--- a/hw/block/nvme.c
+++ b/hw/block/nvme.c
@@ -227,6 +227,29 @@ static uint16_t nvme_flush(NvmeCtrl *n, NvmeNamespace *ns, NvmeCmd *cmd,
return NVME_NO_COMPLETE;
}
+static uint16_t nvme_write_zeros(NvmeCtrl *n, NvmeNamespace *ns, NvmeCmd *cmd,
+ NvmeRequest *req)
+{
+ NvmeRwCmd *rw = (NvmeRwCmd *)cmd;
+ const uint8_t lba_index = NVME_ID_NS_FLBAS_INDEX(ns->id_ns.flbas);
+ const uint8_t data_shift = ns->id_ns.lbaf[lba_index].ds;
+ uint64_t slba = le64_to_cpu(rw->slba);
+ uint32_t nlb = le16_to_cpu(rw->nlb) + 1;
+ uint64_t aio_slba = slba << (data_shift - BDRV_SECTOR_BITS);
+ uint32_t aio_nlb = nlb << (data_shift - BDRV_SECTOR_BITS);
+
+ if (slba + nlb > ns->id_ns.nsze) {
+ return NVME_LBA_RANGE | NVME_DNR;
+ }
+
+ req->has_sg = false;
+ block_acct_start(blk_get_stats(n->conf.blk), &req->acct, 0,
+ BLOCK_ACCT_WRITE);
+ req->aiocb = blk_aio_pwrite_zeroes(n->conf.blk, aio_slba, aio_nlb,
+ BDRV_REQ_MAY_UNMAP, nvme_rw_cb, req);
+ return NVME_NO_COMPLETE;
+}
+
static uint16_t nvme_rw(NvmeCtrl *n, NvmeNamespace *ns, NvmeCmd *cmd,
NvmeRequest *req)
{
@@ -279,6 +302,8 @@ static uint16_t nvme_io_cmd(NvmeCtrl *n, NvmeCmd *cmd, NvmeRequest *req)
switch (cmd->opcode) {
case NVME_CMD_FLUSH:
return nvme_flush(n, ns, cmd, req);
+ case NVME_CMD_WRITE_ZEROS:
+ return nvme_write_zeros(n, ns, cmd, req);
case NVME_CMD_WRITE:
case NVME_CMD_READ:
return nvme_rw(n, ns, cmd, req);
@@ -895,6 +920,7 @@ static int nvme_init(PCIDevice *pci_dev)
id->sqes = (0x6 << 4) | 0x6;
id->cqes = (0x4 << 4) | 0x4;
id->nn = cpu_to_le32(n->num_namespaces);
+ id->oncs = cpu_to_le16(NVME_ONCS_WRITE_ZEROS);
id->psd[0].mp = cpu_to_le16(0x9c4);
id->psd[0].enlat = cpu_to_le32(0x10);
id->psd[0].exlat = cpu_to_le32(0x4);
diff --git a/hw/block/nvme.h b/hw/block/nvme.h
index 8fb0c10756..a0d15649f9 100644
--- a/hw/block/nvme.h
+++ b/hw/block/nvme.h
@@ -179,6 +179,7 @@ enum NvmeIoCommands {
NVME_CMD_READ = 0x02,
NVME_CMD_WRITE_UNCOR = 0x04,
NVME_CMD_COMPARE = 0x05,
+ NVME_CMD_WRITE_ZEROS = 0x08,
NVME_CMD_DSM = 0x09,
};
--
2.11.0
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [Qemu-devel] [PATCH v2] nvme: Implement Write Zeroes
2017-05-05 9:58 [Qemu-devel] [PATCH v2] nvme: Implement Write Zeroes Christoph Hellwig
@ 2017-05-09 15:01 ` Kevin Wolf
2017-05-09 15:09 ` Keith Busch
0 siblings, 1 reply; 4+ messages in thread
From: Kevin Wolf @ 2017-05-09 15:01 UTC (permalink / raw)
To: Christoph Hellwig; +Cc: keith.busch, mreitz, qemu-block, qemu-devel
Am 05.05.2017 um 11:58 hat Christoph Hellwig geschrieben:
> Signed-off-by: Keith Busch <keith.busch@intel.com>
> [hch: ported over from qemu-nvme.git to mainline]
> Signed-off-by: Christoph Hellwig <hch@lst.de>
Keith, can you give an Acked-by for this one? (I see that the code is
originally from you, but just to make sure that you agree with the
changes made and that it is merged into qemu.git this way.)
Kevin
> hw/block/nvme.c | 26 ++++++++++++++++++++++++++
> hw/block/nvme.h | 1 +
> 2 files changed, 27 insertions(+)
>
> Changes since v1:
> - add BDRV_REQ_MAY_UNMAP flag
>
> diff --git a/hw/block/nvme.c b/hw/block/nvme.c
> index ae303d44e5..7428db9f0c 100644
> --- a/hw/block/nvme.c
> +++ b/hw/block/nvme.c
> @@ -227,6 +227,29 @@ static uint16_t nvme_flush(NvmeCtrl *n, NvmeNamespace *ns, NvmeCmd *cmd,
> return NVME_NO_COMPLETE;
> }
>
> +static uint16_t nvme_write_zeros(NvmeCtrl *n, NvmeNamespace *ns, NvmeCmd *cmd,
> + NvmeRequest *req)
> +{
> + NvmeRwCmd *rw = (NvmeRwCmd *)cmd;
> + const uint8_t lba_index = NVME_ID_NS_FLBAS_INDEX(ns->id_ns.flbas);
> + const uint8_t data_shift = ns->id_ns.lbaf[lba_index].ds;
> + uint64_t slba = le64_to_cpu(rw->slba);
> + uint32_t nlb = le16_to_cpu(rw->nlb) + 1;
> + uint64_t aio_slba = slba << (data_shift - BDRV_SECTOR_BITS);
> + uint32_t aio_nlb = nlb << (data_shift - BDRV_SECTOR_BITS);
> +
> + if (slba + nlb > ns->id_ns.nsze) {
> + return NVME_LBA_RANGE | NVME_DNR;
> + }
> +
> + req->has_sg = false;
> + block_acct_start(blk_get_stats(n->conf.blk), &req->acct, 0,
> + BLOCK_ACCT_WRITE);
> + req->aiocb = blk_aio_pwrite_zeroes(n->conf.blk, aio_slba, aio_nlb,
> + BDRV_REQ_MAY_UNMAP, nvme_rw_cb, req);
> + return NVME_NO_COMPLETE;
> +}
> +
> static uint16_t nvme_rw(NvmeCtrl *n, NvmeNamespace *ns, NvmeCmd *cmd,
> NvmeRequest *req)
> {
> @@ -279,6 +302,8 @@ static uint16_t nvme_io_cmd(NvmeCtrl *n, NvmeCmd *cmd, NvmeRequest *req)
> switch (cmd->opcode) {
> case NVME_CMD_FLUSH:
> return nvme_flush(n, ns, cmd, req);
> + case NVME_CMD_WRITE_ZEROS:
> + return nvme_write_zeros(n, ns, cmd, req);
> case NVME_CMD_WRITE:
> case NVME_CMD_READ:
> return nvme_rw(n, ns, cmd, req);
> @@ -895,6 +920,7 @@ static int nvme_init(PCIDevice *pci_dev)
> id->sqes = (0x6 << 4) | 0x6;
> id->cqes = (0x4 << 4) | 0x4;
> id->nn = cpu_to_le32(n->num_namespaces);
> + id->oncs = cpu_to_le16(NVME_ONCS_WRITE_ZEROS);
> id->psd[0].mp = cpu_to_le16(0x9c4);
> id->psd[0].enlat = cpu_to_le32(0x10);
> id->psd[0].exlat = cpu_to_le32(0x4);
> diff --git a/hw/block/nvme.h b/hw/block/nvme.h
> index 8fb0c10756..a0d15649f9 100644
> --- a/hw/block/nvme.h
> +++ b/hw/block/nvme.h
> @@ -179,6 +179,7 @@ enum NvmeIoCommands {
> NVME_CMD_READ = 0x02,
> NVME_CMD_WRITE_UNCOR = 0x04,
> NVME_CMD_COMPARE = 0x05,
> + NVME_CMD_WRITE_ZEROS = 0x08,
> NVME_CMD_DSM = 0x09,
> };
>
> --
> 2.11.0
>
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [Qemu-devel] [PATCH v2] nvme: Implement Write Zeroes
2017-05-09 15:01 ` Kevin Wolf
@ 2017-05-09 15:09 ` Keith Busch
2017-05-09 15:29 ` Kevin Wolf
0 siblings, 1 reply; 4+ messages in thread
From: Keith Busch @ 2017-05-09 15:09 UTC (permalink / raw)
To: Kevin Wolf; +Cc: Christoph Hellwig, mreitz, qemu-block, qemu-devel
On Tue, May 09, 2017 at 05:01:04PM +0200, Kevin Wolf wrote:
> Am 05.05.2017 um 11:58 hat Christoph Hellwig geschrieben:
> > Signed-off-by: Keith Busch <keith.busch@intel.com>
> > [hch: ported over from qemu-nvme.git to mainline]
> > Signed-off-by: Christoph Hellwig <hch@lst.de>
>
> Keith, can you give an Acked-by for this one? (I see that the code is
> originally from you, but just to make sure that you agree with the
> changes made and that it is merged into qemu.git this way.)
No problem, this still looks good to me. Thanks!
Acked-by: Keith Busch <keith.busch@intel.com>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] [PATCH v2] nvme: Implement Write Zeroes
2017-05-09 15:09 ` Keith Busch
@ 2017-05-09 15:29 ` Kevin Wolf
0 siblings, 0 replies; 4+ messages in thread
From: Kevin Wolf @ 2017-05-09 15:29 UTC (permalink / raw)
To: Keith Busch; +Cc: Christoph Hellwig, mreitz, qemu-block, qemu-devel
Am 09.05.2017 um 17:09 hat Keith Busch geschrieben:
> On Tue, May 09, 2017 at 05:01:04PM +0200, Kevin Wolf wrote:
> > Am 05.05.2017 um 11:58 hat Christoph Hellwig geschrieben:
> > > Signed-off-by: Keith Busch <keith.busch@intel.com>
> > > [hch: ported over from qemu-nvme.git to mainline]
> > > Signed-off-by: Christoph Hellwig <hch@lst.de>
> >
> > Keith, can you give an Acked-by for this one? (I see that the code is
> > originally from you, but just to make sure that you agree with the
> > changes made and that it is merged into qemu.git this way.)
>
> No problem, this still looks good to me. Thanks!
>
> Acked-by: Keith Busch <keith.busch@intel.com>
Thanks, applied to the block branch.
Kevin
^ permalink raw reply [flat|nested] 4+ messages in thread
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2017-05-05 9:58 [Qemu-devel] [PATCH v2] nvme: Implement Write Zeroes Christoph Hellwig
2017-05-09 15:01 ` Kevin Wolf
2017-05-09 15:09 ` Keith Busch
2017-05-09 15:29 ` Kevin Wolf
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