From: David Gibson <david@gibson.dropbear.id.au>
To: peter.maydell@linaro.org
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
mdroth@linux.vnet.ibm.com, bharata@linux.vnet.ibm.com,
agraf@suse.de, aik@ozlabs.ru, sjitindarsingh@gmail.com,
mark.cave-ayland@ilande.co.uk, sam.bobroff@au1.ibm.com,
nikunj@linux.vnet.ibm.com, clg@kaod.org,
David Gibson <david@gibson.dropbear.id.au>
Subject: [Qemu-devel] [PULL 13/23] ppc: add qemu_vga.ndrv ROM to fw_cfg interface for NewWorld Macs
Date: Thu, 11 May 2017 14:14:16 +1000 [thread overview]
Message-ID: <20170511041426.6488-14-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <20170511041426.6488-1-david@gibson.dropbear.id.au>
From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
hw/ppc/mac_newworld.c | 18 +++++++++++++++++-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
index 68aaedc..bae1c0a 100644
--- a/hw/ppc/mac_newworld.c
+++ b/hw/ppc/mac_newworld.c
@@ -80,6 +80,8 @@
#define CLOCKFREQ (266UL * 1000UL * 1000UL)
#define BUSFREQ (100UL * 1000UL * 1000UL)
+#define NDRV_VGA_FILENAME "qemu_vga.ndrv"
+
/* UniN device */
static void unin_write(void *opaque, hwaddr addr, uint64_t value,
unsigned size)
@@ -160,7 +162,8 @@ static void ppc_core99_init(MachineState *machine)
MACIOIDEState *macio_ide;
BusState *adb_bus;
MacIONVRAMState *nvr;
- int bios_size;
+ int bios_size, ndrv_size;
+ uint8_t *ndrv_file;
MemoryRegion *pic_mem, *escc_mem;
MemoryRegion *escc_bar = g_new(MemoryRegion, 1);
int ppc_boot_device;
@@ -494,6 +497,19 @@ static void ppc_core99_init(MachineState *machine)
fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ);
fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_NVRAM_ADDR, nvram_addr);
+ /* MacOS NDRV VGA driver */
+ filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME);
+ if (filename) {
+ ndrv_size = get_image_size(filename);
+ if (ndrv_size != -1) {
+ ndrv_file = g_malloc(ndrv_size);
+ ndrv_size = load_image(filename, ndrv_file);
+
+ fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size);
+ }
+ g_free(filename);
+ }
+
qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
}
--
2.9.3
next prev parent reply other threads:[~2017-05-11 4:14 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-11 4:14 [Qemu-devel] [PULL 00/23] ppc-for-2.10 queue 20170511 David Gibson
2017-05-11 4:14 ` [Qemu-devel] [PULL 01/23] ppc/pnv: restrict BMC object to the BMC simulator David Gibson
2017-05-11 4:14 ` [Qemu-devel] [PULL 02/23] target/ppc: Emulate LL/SC using cmpxchg helpers David Gibson
2017-05-11 4:14 ` [Qemu-devel] [PULL 03/23] cputlb: handle first atomic write to the page David Gibson
2017-05-11 4:14 ` [Qemu-devel] [PULL 04/23] target/ppc: Generate fence operations David Gibson
2017-05-11 4:14 ` [Qemu-devel] [PULL 05/23] cpus: Fix CPU unplug for MTTCG David Gibson
2017-05-11 4:14 ` [Qemu-devel] [PULL 06/23] tcg: enable MTTCG by default for PPC64 on x86 David Gibson
2017-05-11 4:14 ` [Qemu-devel] [PULL 07/23] target/ppc: do not reset reserve_addr in exec_enter David Gibson
2017-05-11 4:14 ` [Qemu-devel] [PULL 08/23] ppc/xics: Fix stale irq->status bits after get David Gibson
2017-05-11 4:14 ` [Qemu-devel] [PULL 09/23] ppc/xics: preserve P and Q bits for KVM IRQs David Gibson
2017-05-11 4:14 ` [Qemu-devel] [PULL 10/23] Add QemuMacDrivers as submodule David Gibson
2017-05-11 4:14 ` [Qemu-devel] [PULL 11/23] Add QemuMacDrivers qemu_vga.ndrv revision d4e7d7a built " David Gibson
2017-05-11 4:14 ` [Qemu-devel] [PULL 12/23] ppc: add qemu_vga.ndrv ROM to fw_cfg interface for OldWorld Macs David Gibson
2017-05-11 4:14 ` David Gibson [this message]
2017-05-11 4:14 ` [Qemu-devel] [PULL 14/23] target/ppc: Set UPRT and GTSE on all cpus in H_REGISTER_PROCESS_TABLE David Gibson
2017-05-11 4:14 ` [Qemu-devel] [PULL 15/23] target/ppc: Update tlbie to check privilege level based on GTSE David Gibson
2017-05-11 4:14 ` [Qemu-devel] [PULL 16/23] target/ppc: Change tlbie invalid fields for POWER9 support David Gibson
2017-05-11 4:14 ` [Qemu-devel] [PULL 17/23] target/ppc: Implement ISA V3.00 radix page fault handler David Gibson
2017-05-11 4:14 ` [Qemu-devel] [PULL 18/23] target/ppc: Enable RADIX mmu mode for pseries TCG guest David Gibson
2017-05-11 4:14 ` [Qemu-devel] [PULL 19/23] ppc: xics: fix compilation with CentOS 6 David Gibson
2017-05-11 4:14 ` [Qemu-devel] [PULL 20/23] spapr: Don't accidentally advertise HTM support on POWER9 David Gibson
2017-05-11 4:14 ` [Qemu-devel] [PULL 21/23] target/ppc: Allow workarounds for POWER9 DD1 David Gibson
2017-05-11 4:14 ` [Qemu-devel] [PULL 22/23] pnv: Fix build failures on some host platforms David Gibson
2017-05-11 4:14 ` [Qemu-devel] [PULL 23/23] target/ppc: Avoid printing wrong aliases in CPU help text David Gibson
2017-05-15 13:04 ` [Qemu-devel] [PULL 00/23] ppc-for-2.10 queue 20170511 Stefan Hajnoczi
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20170511041426.6488-14-david@gibson.dropbear.id.au \
--to=david@gibson.dropbear.id.au \
--cc=agraf@suse.de \
--cc=aik@ozlabs.ru \
--cc=bharata@linux.vnet.ibm.com \
--cc=clg@kaod.org \
--cc=mark.cave-ayland@ilande.co.uk \
--cc=mdroth@linux.vnet.ibm.com \
--cc=nikunj@linux.vnet.ibm.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
--cc=sam.bobroff@au1.ibm.com \
--cc=sjitindarsingh@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).