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From: Aurelien Jarno <aurelien@aurel32.net>
To: qemu-devel@nongnu.org
Cc: Richard Henderson <rth@twiddle.net>,
	Alexander Graf <agraf@suse.de>,
	Aurelien Jarno <aurelien@aurel32.net>
Subject: [Qemu-devel] [PATCH v4 3/3] target/s390x: check alignment in CDSG in the !CONFIG_ATOMIC128 case
Date: Sun,  4 Jun 2017 22:20:34 +0200	[thread overview]
Message-ID: <20170604202034.16615-4-aurelien@aurel32.net> (raw)
In-Reply-To: <20170604202034.16615-1-aurelien@aurel32.net>

The CDSG instruction requires a 16-byte alignement, as expressed in
the MO_ALIGN_16 passed to helper_atomic_cmpxchgo_be_mmu. In the non
parallel case, use check_alignment to enforce this.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 target/s390x/mem_helper.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c
index a8988e0293..80caab9c9d 100644
--- a/target/s390x/mem_helper.c
+++ b/target/s390x/mem_helper.c
@@ -1262,6 +1262,8 @@ void HELPER(cdsg)(CPUS390XState *env, uint64_t addr,
     } else {
         uint64_t oldh, oldl;
 
+        check_alignment(env, addr, 16, ra);
+
         oldh = cpu_ldq_data_ra(env, addr + 0, ra);
         oldl = cpu_ldq_data_ra(env, addr + 8, ra);
 
-- 
2.11.0

  parent reply	other threads:[~2017-06-04 20:20 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-04 20:20 [Qemu-devel] [PATCH v4 0/3] target/s390x: implement loads/store quadword Aurelien Jarno
2017-06-04 20:20 ` [Qemu-devel] [PATCH v4 1/3] target/s390x: implement LOAD PAIR FROM QUADWORD Aurelien Jarno
2017-06-04 20:20 ` [Qemu-devel] [PATCH v4 2/3] target/s390x: implement STORE PAIR TO QUADWORD Aurelien Jarno
2017-06-04 20:20 ` Aurelien Jarno [this message]
2017-06-07  0:33 ` [Qemu-devel] [PATCH v4 0/3] target/s390x: implement loads/store quadword Richard Henderson

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