From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33263) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dLhri-0002UV-Dl for qemu-devel@nongnu.org; Thu, 15 Jun 2017 23:24:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dLhrf-0000Lm-AP for qemu-devel@nongnu.org; Thu, 15 Jun 2017 23:24:06 -0400 Received: from mx1.redhat.com ([209.132.183.28]:38116) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dLhrf-0000L0-4Z for qemu-devel@nongnu.org; Thu, 15 Jun 2017 23:24:03 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 22F33C0587CF for ; Fri, 16 Jun 2017 03:24:02 +0000 (UTC) Date: Fri, 16 Jun 2017 06:23:59 +0300 From: "Michael S. Tsirkin" Message-ID: <20170616062332-mutt-send-email-mst@kernel.org> References: <20170608161013.17920-1-lersek@redhat.com> <20170608204026-mutt-send-email-mst@kernel.org> <1496951333.29761.5.camel@redhat.com> <20170608224942-mutt-send-email-mst@kernel.org> <7a7647cd-3d7a-0b6f-0691-d656c9026f44@redhat.com> <1497038478.10080.1.camel@redhat.com> <20170614211927-mutt-send-email-mst@kernel.org> <1497510465.5952.1.camel@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1497510465.5952.1.camel@redhat.com> Subject: Re: [Qemu-devel] [PATCH] q35/mch: implement extended TSEG sizes List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Gerd Hoffmann Cc: Paolo Bonzini , Laszlo Ersek , qemu devel list On Thu, Jun 15, 2017 at 09:07:45AM +0200, Gerd Hoffmann wrote: > Hi, > > > To be specific, what I meant is a bit that tells guest that a > > config space register is available, and lets host find out > > that guest is going to use it. > > > > This to ensure full forward and backward compatibility. > > > > I agree a fw cfg file for a single bit seems like an overkill, that's > > why I thought sharing feature files with SMI would be a good idea. > > > > Do you see an issue with that? > > The point of placing the extended-tseg-size register in mch pci config > is that the firmware can figure this easily *without* looking somewhere > else, as all the other tseg (and smram) config bits are in mch pci > config space too. > > When involving fw_cfg there is no reason to keep the extended-tseg-size > register in mch. We can simply place a "etc/q35-extended-tseg-size" > file in fw_cfg then (which is either not present or contains the > extended tseg size). So a feature bit in fw_cfg looks absolutely > pointless to me. > > I still think the approach and patch by Laszlo is perfectly fine. > While being at it: > > Reviewed-by: Gerd Hoffmann > > cheers, > Gerd I guess I'll merge it and we'll see if there's any fallout. Thanks everyone. -- MST