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From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 12/12] target/arm: Exit after clearing aarch64 interrupt mask
Date: Mon, 19 Jun 2017 11:18:39 -0700	[thread overview]
Message-ID: <20170619181839.25249-13-rth@twiddle.net> (raw)
In-Reply-To: <20170619181839.25249-1-rth@twiddle.net>

Exit to cpu loop so we reevaluate cpu_arm_hw_interrupts.

Tested-by: Emilio G. Cota <cota@braap.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Emilio G. Cota <cota@braap.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target/arm/translate-a64.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 860e279..e55547d 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -1422,7 +1422,9 @@ static void handle_msr_i(DisasContext *s, uint32_t insn,
         gen_helper_msr_i_pstate(cpu_env, tcg_op, tcg_imm);
         tcg_temp_free_i32(tcg_imm);
         tcg_temp_free_i32(tcg_op);
-        s->is_jmp = DISAS_UPDATE;
+        /* For DAIFClear, exit the cpu loop to re-evaluate pending IRQs.  */
+        gen_a64_set_pc_im(s->pc);
+        s->is_jmp = (op == 0x1f ? DISAS_EXIT : DISAS_JUMP);
         break;
     }
     default:
@@ -11369,6 +11371,9 @@ void gen_intermediate_code_a64(ARMCPU *cpu, TranslationBlock *tb)
         case DISAS_JUMP:
             tcg_gen_lookup_and_goto_ptr(cpu_pc);
             break;
+        case DISAS_EXIT:
+            tcg_gen_exit_tb(0);
+            break;
         case DISAS_TB_JUMP:
         case DISAS_EXC:
         case DISAS_SWI:
-- 
2.9.4

  parent reply	other threads:[~2017-06-19 18:18 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-19 18:18 [Qemu-devel] [PULL 00/12] TCG queued patches Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 01/12] util: add cacheinfo Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 02/12] tcg: allocate TB structs before the corresponding translated code Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 03/12] translate-all: consolidate tb init in tb_gen_code Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 04/12] tcg/aarch64: Use ADR in tcg_out_movi Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 05/12] tcg/arm: Use indirect branch for goto_tb Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 06/12] tcg/arm: Remove limit on code buffer size Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 07/12] tcg/arm: Try pc-relative addresses for movi Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 08/12] tcg/arm: Use ldr (literal) for goto_tb Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 09/12] tcg: Increase hit rate of lookup_tb_ptr Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 10/12] target/alpha: Use tcg_gen_lookup_and_goto_ptr Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 11/12] target/s390x: Exit after changing PSW mask Richard Henderson
2017-06-19 18:18 ` Richard Henderson [this message]
2017-06-22 10:34 ` [Qemu-devel] [PULL 00/12] TCG queued patches Peter Maydell

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