From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 04/12] tcg/aarch64: Use ADR in tcg_out_movi
Date: Mon, 19 Jun 2017 11:18:31 -0700 [thread overview]
Message-ID: <20170619181839.25249-5-rth@twiddle.net> (raw)
In-Reply-To: <20170619181839.25249-1-rth@twiddle.net>
The new placement of the TB means that we can use one insn
to load the return value for exit_tb returning the TB pointer.
Tested-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
tcg/aarch64/tcg-target.inc.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
index 5f18545..1fa3bcc 100644
--- a/tcg/aarch64/tcg-target.inc.c
+++ b/tcg/aarch64/tcg-target.inc.c
@@ -616,7 +616,12 @@ static void tcg_out_movi(TCGContext *s, TCGType type, TCGReg rd,
/* Look for host pointer values within 4G of the PC. This happens
often when loading pointers to QEMU's own data structures. */
if (type == TCG_TYPE_I64) {
- tcg_target_long disp = (value >> 12) - ((intptr_t)s->code_ptr >> 12);
+ tcg_target_long disp = value - (intptr_t)s->code_ptr;
+ if (disp == sextract64(disp, 0, 21)) {
+ tcg_out_insn(s, 3406, ADR, rd, disp);
+ return;
+ }
+ disp = (value >> 12) - ((intptr_t)s->code_ptr >> 12);
if (disp == sextract64(disp, 0, 21)) {
tcg_out_insn(s, 3406, ADRP, rd, disp);
if (value & 0xfff) {
--
2.9.4
next prev parent reply other threads:[~2017-06-19 18:18 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-19 18:18 [Qemu-devel] [PULL 00/12] TCG queued patches Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 01/12] util: add cacheinfo Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 02/12] tcg: allocate TB structs before the corresponding translated code Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 03/12] translate-all: consolidate tb init in tb_gen_code Richard Henderson
2017-06-19 18:18 ` Richard Henderson [this message]
2017-06-19 18:18 ` [Qemu-devel] [PULL 05/12] tcg/arm: Use indirect branch for goto_tb Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 06/12] tcg/arm: Remove limit on code buffer size Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 07/12] tcg/arm: Try pc-relative addresses for movi Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 08/12] tcg/arm: Use ldr (literal) for goto_tb Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 09/12] tcg: Increase hit rate of lookup_tb_ptr Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 10/12] target/alpha: Use tcg_gen_lookup_and_goto_ptr Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 11/12] target/s390x: Exit after changing PSW mask Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 12/12] target/arm: Exit after clearing aarch64 interrupt mask Richard Henderson
2017-06-22 10:34 ` [Qemu-devel] [PULL 00/12] TCG queued patches Peter Maydell
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