From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 07/12] tcg/arm: Try pc-relative addresses for movi
Date: Mon, 19 Jun 2017 11:18:34 -0700 [thread overview]
Message-ID: <20170619181839.25249-8-rth@twiddle.net> (raw)
In-Reply-To: <20170619181839.25249-1-rth@twiddle.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
tcg/arm/tcg-target.inc.c | 40 +++++++++++++++++++++++++++-------------
1 file changed, 27 insertions(+), 13 deletions(-)
diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c
index fce382f..42370e5 100644
--- a/tcg/arm/tcg-target.inc.c
+++ b/tcg/arm/tcg-target.inc.c
@@ -418,23 +418,37 @@ static inline void tcg_out_dat_imm(TCGContext *s,
static void tcg_out_movi32(TCGContext *s, int cond, int rd, uint32_t arg)
{
- int rot, opc, rn;
-
- /* For armv7, make sure not to use movw+movt when mov/mvn would do.
- Speed things up by only checking when movt would be required.
- Prior to armv7, have one go at fully rotated immediates before
- doing the decomposition thing below. */
- if (!use_armv7_instructions || (arg & 0xffff0000)) {
- rot = encode_imm(arg);
+ int rot, opc, rn, diff;
+
+ /* Check a single MOV/MVN before anything else. */
+ rot = encode_imm(arg);
+ if (rot >= 0) {
+ tcg_out_dat_imm(s, cond, ARITH_MOV, rd, 0,
+ rotl(arg, rot) | (rot << 7));
+ return;
+ }
+ rot = encode_imm(~arg);
+ if (rot >= 0) {
+ tcg_out_dat_imm(s, cond, ARITH_MVN, rd, 0,
+ rotl(~arg, rot) | (rot << 7));
+ return;
+ }
+
+ /* Check for a pc-relative address. This will usually be the TB,
+ or within the TB, which is immediately before the code block. */
+ diff = arg - ((intptr_t)s->code_ptr + 8);
+ if (diff >= 0) {
+ rot = encode_imm(diff);
if (rot >= 0) {
- tcg_out_dat_imm(s, cond, ARITH_MOV, rd, 0,
- rotl(arg, rot) | (rot << 7));
+ tcg_out_dat_imm(s, cond, ARITH_ADD, rd, TCG_REG_PC,
+ rotl(diff, rot) | (rot << 7));
return;
}
- rot = encode_imm(~arg);
+ } else {
+ rot = encode_imm(-diff);
if (rot >= 0) {
- tcg_out_dat_imm(s, cond, ARITH_MVN, rd, 0,
- rotl(~arg, rot) | (rot << 7));
+ tcg_out_dat_imm(s, cond, ARITH_SUB, rd, TCG_REG_PC,
+ rotl(-diff, rot) | (rot << 7));
return;
}
}
--
2.9.4
next prev parent reply other threads:[~2017-06-19 18:18 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-19 18:18 [Qemu-devel] [PULL 00/12] TCG queued patches Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 01/12] util: add cacheinfo Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 02/12] tcg: allocate TB structs before the corresponding translated code Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 03/12] translate-all: consolidate tb init in tb_gen_code Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 04/12] tcg/aarch64: Use ADR in tcg_out_movi Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 05/12] tcg/arm: Use indirect branch for goto_tb Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 06/12] tcg/arm: Remove limit on code buffer size Richard Henderson
2017-06-19 18:18 ` Richard Henderson [this message]
2017-06-19 18:18 ` [Qemu-devel] [PULL 08/12] tcg/arm: Use ldr (literal) for goto_tb Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 09/12] tcg: Increase hit rate of lookup_tb_ptr Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 10/12] target/alpha: Use tcg_gen_lookup_and_goto_ptr Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 11/12] target/s390x: Exit after changing PSW mask Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 12/12] target/arm: Exit after clearing aarch64 interrupt mask Richard Henderson
2017-06-22 10:34 ` [Qemu-devel] [PULL 00/12] TCG queued patches Peter Maydell
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