From: Laurent Vivier <laurent@vivier.eu>
To: qemu-devel@nongnu.org
Cc: Laurent Vivier <laurent@vivier.eu>
Subject: [Qemu-devel] [PULL 1/5] target-m68k: move fmove CR to a function
Date: Wed, 21 Jun 2017 23:00:43 +0200 [thread overview]
Message-ID: <20170621210047.24083-2-laurent@vivier.eu> (raw)
In-Reply-To: <20170621210047.24083-1-laurent@vivier.eu>
Move code of fmove to/from control register to a function
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20170620205121.26515-2-laurent@vivier.eu>
---
target/m68k/translate.c | 56 +++++++++++++++++++++++++++----------------------
1 file changed, 31 insertions(+), 25 deletions(-)
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index dfecfb6..c9a5fe4 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -4099,6 +4099,35 @@ DISAS_INSN(trap)
gen_exception(s, s->pc - 2, EXCP_TRAP0 + (insn & 0xf));
}
+static void gen_op_fmove_fcr(CPUM68KState *env, DisasContext *s,
+ uint32_t insn, uint32_t ext)
+{
+ int mask = (ext >> 10) & 7;
+ int is_write = (ext >> 13) & 1;
+ TCGv val;
+
+ switch (mask) {
+ case 1: /* FPIAR */
+ case 2: /* FPSR */
+ default:
+ qemu_log_mask(LOG_UNIMP, "Unimplemented: fmove to/from control %d",
+ mask);
+ goto undef;
+ case 4: /* FPCR */
+ if (is_write) {
+ val = tcg_const_i32(0);
+ DEST_EA(env, insn, OS_LONG, val, NULL);
+ tcg_temp_free(val);
+ }
+ /* Not implemented. Ignore register update */
+ break;
+ }
+ return;
+undef:
+ s->pc -= 2;
+ disas_undef_fpu(env, s, insn);
+}
+
/* ??? FP exceptions are not implemented. Most exceptions are deferred until
immediately before the next FP instruction is executed. */
DISAS_INSN(fpu)
@@ -4177,32 +4206,9 @@ DISAS_INSN(fpu)
tcg_temp_free_i32(tmp32);
return;
case 4: /* fmove to control register. */
- switch ((ext >> 10) & 7) {
- case 4: /* FPCR */
- /* Not implemented. Ignore writes. */
- break;
- case 1: /* FPIAR */
- case 2: /* FPSR */
- default:
- cpu_abort(NULL, "Unimplemented: fmove to control %d",
- (ext >> 10) & 7);
- }
- break;
case 5: /* fmove from control register. */
- switch ((ext >> 10) & 7) {
- case 4: /* FPCR */
- /* Not implemented. Always return zero. */
- tmp32 = tcg_const_i32(0);
- break;
- case 1: /* FPIAR */
- case 2: /* FPSR */
- default:
- cpu_abort(NULL, "Unimplemented: fmove from control %d",
- (ext >> 10) & 7);
- goto undef;
- }
- DEST_EA(env, insn, OS_LONG, tmp32, NULL);
- break;
+ gen_op_fmove_fcr(env, s, insn, ext);
+ return;
case 6: /* fmovem */
case 7:
{
--
2.9.4
next prev parent reply other threads:[~2017-06-21 21:00 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-21 21:00 [Qemu-devel] [PULL 0/5] M68k for 2.10 patches Laurent Vivier
2017-06-21 21:00 ` Laurent Vivier [this message]
2017-06-21 21:00 ` [Qemu-devel] [PULL 2/5] target-m68k: initialize FPU registers Laurent Vivier
2017-06-21 21:00 ` [Qemu-devel] [PULL 3/5] target-m68k: use floatx80 internally Laurent Vivier
2017-06-21 21:00 ` [Qemu-devel] [PULL 4/5] target-m68k: define 96bit FP registers for gdb on 680x0 Laurent Vivier
2017-06-21 21:00 ` [Qemu-devel] [PULL 5/5] target-m68k: add FPCR and FPSR Laurent Vivier
2017-06-23 8:44 ` [Qemu-devel] [PULL 0/5] M68k for 2.10 patches Peter Maydell
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