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From: Aaron Larson <alarson@ddci.com>
To: agraf@suse.de, alarson@ddci.com, david@gibson.dropbear.id.au,
	qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Subject: [Qemu-devel] [PATCH] target-ppc: SPR_BOOKE_ESR not set on FP exceptions
Date: Wed, 21 Jun 2017 17:03:08 -0700	[thread overview]
Message-ID: <201706220003.v5M038Ns005683@linux03a.ddci.com> (raw)

Properly set the book E exception syndrome register when a floating
point exception occurs.

Currently on a book E processor, the POWERPC_EXCP_FP exception handler
fails to set "env->spr[SPR_BOOKE_ESR] = ESR_FP;" as required by the
book E specification.

Signed-off-by: Aaron Larson <alarson@ddci.com>
---
 target/ppc/excp_helper.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 9cb2123..7a82bdd 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -282,6 +282,7 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp)
              * precise in the MSR.
              */
             msr |= 0x00100000;
+            env->spr[SPR_BOOKE_ESR] = ESR_FP;
             break;
         case POWERPC_EXCP_INVAL:
             LOG_EXCP("Invalid instruction at " TARGET_FMT_lx "\n", env->nip);
-- 
2.7.4

             reply	other threads:[~2017-06-22  0:03 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-22  0:03 Aaron Larson [this message]
2017-07-02  3:58 ` [Qemu-devel] [PATCH] target-ppc: SPR_BOOKE_ESR not set on FP exceptions David Gibson

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