* [Qemu-devel] [PATCH] target-ppc: SPR_BOOKE_ESR not set on FP exceptions
@ 2017-06-22 0:03 Aaron Larson
2017-07-02 3:58 ` David Gibson
0 siblings, 1 reply; 2+ messages in thread
From: Aaron Larson @ 2017-06-22 0:03 UTC (permalink / raw)
To: agraf, alarson, david, qemu-devel, qemu-ppc
Properly set the book E exception syndrome register when a floating
point exception occurs.
Currently on a book E processor, the POWERPC_EXCP_FP exception handler
fails to set "env->spr[SPR_BOOKE_ESR] = ESR_FP;" as required by the
book E specification.
Signed-off-by: Aaron Larson <alarson@ddci.com>
---
target/ppc/excp_helper.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 9cb2123..7a82bdd 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -282,6 +282,7 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp)
* precise in the MSR.
*/
msr |= 0x00100000;
+ env->spr[SPR_BOOKE_ESR] = ESR_FP;
break;
case POWERPC_EXCP_INVAL:
LOG_EXCP("Invalid instruction at " TARGET_FMT_lx "\n", env->nip);
--
2.7.4
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [Qemu-devel] [PATCH] target-ppc: SPR_BOOKE_ESR not set on FP exceptions
2017-06-22 0:03 [Qemu-devel] [PATCH] target-ppc: SPR_BOOKE_ESR not set on FP exceptions Aaron Larson
@ 2017-07-02 3:58 ` David Gibson
0 siblings, 0 replies; 2+ messages in thread
From: David Gibson @ 2017-07-02 3:58 UTC (permalink / raw)
To: Aaron Larson; +Cc: agraf, qemu-devel, qemu-ppc
[-- Attachment #1: Type: text/plain, Size: 1249 bytes --]
On Wed, Jun 21, 2017 at 05:03:08PM -0700, Aaron Larson wrote:
> Properly set the book E exception syndrome register when a floating
> point exception occurs.
>
> Currently on a book E processor, the POWERPC_EXCP_FP exception handler
> fails to set "env->spr[SPR_BOOKE_ESR] = ESR_FP;" as required by the
> book E specification.
>
> Signed-off-by: Aaron Larson <alarson@ddci.com>
Applied to ppc-for-2.10.
> ---
> target/ppc/excp_helper.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
> index 9cb2123..7a82bdd 100644
> --- a/target/ppc/excp_helper.c
> +++ b/target/ppc/excp_helper.c
> @@ -282,6 +282,7 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp)
> * precise in the MSR.
> */
> msr |= 0x00100000;
> + env->spr[SPR_BOOKE_ESR] = ESR_FP;
> break;
> case POWERPC_EXCP_INVAL:
> LOG_EXCP("Invalid instruction at " TARGET_FMT_lx "\n", env->nip);
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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