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From: James Hogan <james.hogan@imgtec.com>
To: Yongbok Kim <yongbok.kim@imgtec.com>
Cc: qemu-devel@nongnu.org, Aurelien Jarno <aurelien@aurel32.net>
Subject: Re: [Qemu-devel] [PATCH 4/9] target-mips: Check memory permissions with mem_idx
Date: Thu, 6 Jul 2017 21:50:26 +0100	[thread overview]
Message-ID: <20170706205026.GA32741@jhogan-linux.le.imgtec.org> (raw)
In-Reply-To: <6785d7db-8866-9f50-b182-24c7ed69e34d@imgtec.com>

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On Fri, Oct 07, 2016 at 04:48:31PM +0100, Yongbok Kim wrote:
> On 06/09/2016 12:03, James Hogan wrote:
> > diff --git a/target-mips/helper.c b/target-mips/helper.c
> > index 29ebf391cb94..2065fc3ec119 100644
> > --- a/target-mips/helper.c
> > +++ b/target-mips/helper.c

> > @@ -413,11 +413,12 @@ static void raise_mmu_exception(CPUMIPSState *env, target_ulong address,
> >  hwaddr mips_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
> >  {
> >      MIPSCPU *cpu = MIPS_CPU(cs);
> > +    CPUMIPSState *env = &cpu->env;
> 
> Not really useful change as it is used only once but it is ok.

Its used twice in the code below ...

> 
> >      hwaddr phys_addr;
> >      int prot;
> >  
> > -    if (get_physical_address(&cpu->env, &phys_addr, &prot, addr, 0,
> > -                             ACCESS_INT) != 0) {
> > +    if (get_physical_address(env, &phys_addr, &prot, addr, 0, ACCESS_INT,
> > +                             cpu_mmu_index(env, false)) != 0) {

... though I acknowledge it has marginal value

> Otherwise,
> 
> Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com>

Thanks
James

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  reply	other threads:[~2017-07-06 20:50 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-06 11:03 [Qemu-devel] [PATCH 0/9] target-mips: Add Enhanced Virtual Addressing (EVA) support James Hogan
2016-09-06 11:03 ` [Qemu-devel] [PATCH 1/9] target-mips: Add CP0_Ebase.WG (write gate) support James Hogan
2016-10-07 13:42   ` Yongbok Kim
2016-10-07 15:37     ` James Hogan
2016-09-06 11:03 ` [Qemu-devel] [PATCH 2/9] target-mips: Prepare loads/stores for EVA James Hogan
2016-10-07 15:32   ` Yongbok Kim
2016-09-06 11:03 ` [Qemu-devel] [PATCH 3/9] target-mips: Decode EVA load & store instructions James Hogan
2016-10-07 15:34   ` Yongbok Kim
2016-10-07 15:48     ` James Hogan
2016-10-07 16:05       ` Yongbok Kim
2016-10-07 16:16         ` James Hogan
2016-09-06 11:03 ` [Qemu-devel] [PATCH 4/9] target-mips: Check memory permissions with mem_idx James Hogan
2016-10-07 15:48   ` Yongbok Kim
2017-07-06 20:50     ` James Hogan [this message]
2016-09-06 11:03 ` [Qemu-devel] [PATCH 5/9] target-mips: Abstract mmu_idx from hflags James Hogan
2016-10-07 16:08   ` Yongbok Kim
2017-07-06 20:55     ` James Hogan
2016-09-06 11:03 ` [Qemu-devel] [PATCH 6/9] target-mips: Add an MMU mode for ERL James Hogan
2016-10-13 13:18   ` Yongbok Kim
2017-07-06 20:58     ` James Hogan
2016-09-06 11:03 ` [Qemu-devel] [PATCH 7/9] target-mips: Add segmentation control registers James Hogan
2016-10-10 14:57   ` Yongbok Kim
2017-07-06 22:05     ` James Hogan
2016-09-06 11:03 ` [Qemu-devel] [PATCH 8/9] target-mips: Implement segmentation control James Hogan
2016-10-13 13:06   ` Yongbok Kim
2017-07-06 23:15     ` James Hogan
2016-09-06 11:03 ` [Qemu-devel] [PATCH 9/9] target-mips: Add EVA support to P5600 James Hogan
2016-10-13 13:15   ` Yongbok Kim
2016-09-06 11:18 ` [Qemu-devel] [PATCH 0/9] target-mips: Add Enhanced Virtual Addressing (EVA) support no-reply
2016-09-06 12:09   ` James Hogan

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